Invention Grant
- Patent Title: Reduction of power consumption in a half-duplex transceiver
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Application No.: US14560011Application Date: 2014-12-04
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Publication No.: US09756572B2Publication Date: 2017-09-05
- Inventor: Sriram Murali , Sarma Gunturi , Jaiganesh Balakrishnan , Murugesh Subramaniam , Harikrishna Parthasarathy
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: H04W52/02
- IPC: H04W52/02 ; H04W76/04 ; H04L5/16 ; H04L25/49 ; H04L27/14 ; H04B1/44

Abstract:
Circuits and methods for reducing power consumption in a half-duplex transceiver are disclosed. In an embodiment, a power management circuit of half-duplex transceiver includes direct current to direct current (DC-DC) converter and snooze mode controller. The DC-DC converter includes switching circuit and driver circuit to drive the switching circuit. The DC-DC converter provides power supply to at least one element of a transmitter sub-system of the half-duplex transceiver, and operates in snooze control modes. The snooze mode controller is coupled to the DC-DC converter and configured to generate a control signal based on at least one transceiver operating input, where the control signal causes the DC-DC converter to operate in one of the snooze control modes, the snooze control modes corresponding to snooze duty cycles and where in each snooze control mode, the switching circuit and the driver circuit remain in an OFF-state based on a respective snooze duty cycle.
Public/Granted literature
- US20160165536A1 REDUCTION OF POWER CONSUMPTION IN A HALF-DUPLEX TRANSCEIVER Public/Granted day:2016-06-09
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