- Patent Title: Memory device, memory system and method of operating memory device
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Application No.: US15357291Application Date: 2016-11-21
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Publication No.: US09761315B2Publication Date: 2017-09-12
- Inventor: Sang-Wan Nam , Doo-Hyun Kim , Dae-Seok Byeon , Chi-Weon Yoon
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2015-0094938 20150702
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04 ; G11C16/14 ; G11C16/16 ; G11C16/26 ; G11C16/06 ; G11C16/34 ; G11C16/10 ; H01L27/11582 ; G11C16/12

Abstract:
A memory device is provided as follows. A memory cell region includes a plurality of blocks, each block including a plurality of NAND strings. A control logic divides the plurality of blocks into a plurality of block regions based on a smaller distance of a first distance with respect to a first edge of the memory cell region and a second distance with respect to a second edge of the memory cell region and controls an operation performed on the memory cell region using a plurality of bias sets of operation parameters for the operation. Each bias set is associated with one of the block regions.
Public/Granted literature
- US09799404B2 Memory device, memory system and method of operating memory device Public/Granted day:2017-10-24
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