Invention Grant
- Patent Title: Packaged IC with solderable sidewalls
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Application No.: US15368413Application Date: 2016-12-02
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Publication No.: US09780060B2Publication Date: 2017-10-03
- Inventor: Yong Lin , Vikas Gupta , Rongwei Zhang
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/495 ; H01L23/31 ; H01L21/48 ; H01L21/56 ; H01L21/78 ; H01L23/544 ; H01L21/304

Abstract:
A packaged IC wherein a portion of the sidewalls of the packaged IC are solderable metal. A method of forming a packaged IC wherein a portion of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal. A method of forming a packaged IC wherein all of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal and a portion of sidewall of the molding compound is solderable metal.
Public/Granted literature
- US20170162530A1 Packaged IC with Solderable Sidewalls Public/Granted day:2017-06-08
Information query
IPC分类: