公开(公告)号：US20180166369A1

公开(公告)日：2018-06-14

申请号：US15378236

申请日：2016-12-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Yong Lin

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L23/29 ,  B32B15/092 ,  B32B7/10

Abstract: A device comprises a substrate) of a first material with a surface, which is modified by depositing a bi-layer nanoparticle film. The film includes a nanoparticle layer of a second material on top of and in contact with surface, and a nanoparticle layer of a third material on top of and in contact with the nanoparticle layer of the second material. The nanoparticles of the third material adhere to the nanoparticles of the second material. The substrate region adjoining surface comprises an admixture of the second material in the first material. A fourth material contacts and chemically/mechanically bonds to the nanoparticle layer of the third material.

公开(公告)号：US09865527B1

公开(公告)日：2018-01-09

申请号：US15388616

申请日：2016-12-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Yong Lin

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/29 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/49558 ,  H01L21/4821 ,  H01L21/565 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/49582

Abstract: A device comprises a substrate and an adhesive nanoparticle layer patterned into zones of electrical conductance and insulation on top of the substrate surface. A diffusion region adjoining the surface comprises an admixture of the nanoparticles in the substrate material. When the nanoparticle layer is patterned from originally all-conductive nanoparticles, the insulating zones are created by selective oxidation; when the nanoparticle layer is patterned from originally all-non-conductive nanoparticles, the conductive zones are created by depositing selectively a volatile reducing agent. A package of insulating material is in touch with the nanoparticle layer and fills any voids in the nanoparticle layer.

公开(公告)号：US20150115421A1

公开(公告)日：2015-04-30

申请号：US14064671

申请日：2013-10-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bernardo Gallegos ,  Yong Lin

IPC: H01L23/495

CPC classification number: H01L23/49558 ,  H01L23/49541 ,  H01L23/49548 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method and apparatus of minimizing resin bleed and mold flash on integrated lead finishes by providing groves on the external leads that can control the length of resin bleed.

Abstract translation: 通过在可以控制树脂流失长度的外部引线上提供树脂，使集成铅涂层上的树脂渗出和模具闪光最小化的方法和装置。

公开(公告)号：US09780060B2

公开(公告)日：2017-10-03

申请号：US15368413

申请日：2016-12-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yong Lin ,  Vikas Gupta ,  Rongwei Zhang

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/544 ,  H01L21/304

CPC classification number: H01L24/29 ,  H01L21/304 ,  H01L21/4825 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49503 ,  H01L23/49517 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/544 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2224/13101 ,  H01L2224/16245 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29034 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29169 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2924/0665

Abstract: A packaged IC wherein a portion of the sidewalls of the packaged IC are solderable metal. A method of forming a packaged IC wherein a portion of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal. A method of forming a packaged IC wherein all of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal and a portion of sidewall of the molding compound is solderable metal.

公开(公告)号：US20170053854A1

公开(公告)日：2017-02-23

申请号：US15346822

申请日：2016-11-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Juan Alejandro Herbsommer ,  Yong Lin ,  Rongwei Zhang ,  Abram Castro ,  Matthew David Romig

IPC: H01L23/495 ,  H01L25/00 ,  H01L21/48 ,  H01L25/065

CPC classification number: H01L23/4952 ,  H01L21/2885 ,  H01L21/4821 ,  H01L21/4825 ,  H01L21/4867 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49572 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49883 ,  H01L24/05 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0612 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/75 ,  H01L2224/83192 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/1511 ,  H01L2924/1711 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/0665

Abstract: A method of lead frame surface modification includes providing at least one pre-fabricated metal lead frame or package substrate (substrate) unit including a base metal having a die pad and a plurality of contact regions surrounding the die pad. An ink including a material that is a solid or a precursor for a solid that forms a solid upon a curing step or a sintering step that removes a liquid carrier is additively deposited including onto at least one of (i) a region of the die pad and (ii) at one region of at least a first of the contact regions (first contact region). The ink is sintered or cured to remove the liquid carrier so that a substantially solid ink residue remains.

Abstract translation: 引线框架表面改性的方法包括提供至少一个预制金属引线框架或封装基板（基板）单元，其包括具有管芯焊盘和围绕管芯焊盘的多个接触区域的母材。 包括在固化步骤上形成固体的固体的材料或去除液体载体的烧结步骤的材料的油墨被加成沉积，其包括至少一个（i）芯片垫的区域 和（ii）在至少第一接触区域（第一接触区域）的一个区域。 油墨被烧结或固化以除去液体载体，使得残留基本上固体的油墨残余物。

公开(公告)号：US10147672B2

公开(公告)日：2018-12-04

申请号：US15133857

申请日：2016-04-20

Applicant: Texas Instruments Incorporated

Inventor： Yong Lin ,  Sadia Arefin Khan ,  Benjamin Stassen Cook

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: An integrated circuit (IC) includes a lead frame that has a set of leads coupled to a corresponding set of pins. A semiconductor die with contacts is coupled to the set of leads. Encapsulating material encloses the semiconductor die, such that the set of pins extend beyond the encapsulating material. An additive coating covers one or more of the plurality of pins.

公开(公告)号：US20170365575A1

公开(公告)日：2017-12-21

申请号：US15690074

申请日：2017-08-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yong Lin ,  Vikas Gupta ,  Rongwei Zhang

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/544 ,  H01L23/31 ,  H01L21/304 ,  H01L23/495 ,  H01L21/48 ,  H01L21/78

CPC classification number: H01L24/29 ,  H01L21/304 ,  H01L21/4825 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49503 ,  H01L23/49517 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/544 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2224/13101 ,  H01L2224/16245 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29034 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29169 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/00

Abstract: A packaged IC wherein a portion of the sidewalls of the packaged IC are solderable metal. A method of forming a packaged IC wherein a portion of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal. A method of forming a packaged IC wherein all of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal and a portion of sidewall of the molding compound is solderable metal.

公开(公告)号：US20170309553A1

公开(公告)日：2017-10-26

申请号：US15133857

申请日：2016-04-20

Applicant: Texas Instruments Incorporated

Inventor： Yong Lin ,  Sadia Arefin Khan ,  Benjamin Stassen Cook

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L23/49558 ,  H01L21/4842 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49541 ,  H01L2224/48247 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/00012

Abstract: An integrated circuit (IC) includes a lead frame that has a set of leads coupled to a corresponding set of pins. A semiconductor die with contacts is coupled to the set of leads. Encapsulating material encloses the semiconductor die, such that the set of pins extend beyond the encapsulating material. An additive coating covers one or more of the plurality of pins.

公开(公告)号：US20170162530A1

公开(公告)日：2017-06-08

申请号：US15368413

申请日：2016-12-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yong Lin ,  Vikas Gupta ,  Rongwei Zhang

IPC: H01L23/00 ,  H01L21/78 ,  H01L21/48 ,  H01L21/56 ,  H01L23/495 ,  H01L23/31

CPC classification number: H01L24/29 ,  H01L21/304 ,  H01L21/4825 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49503 ,  H01L23/49517 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/544 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2224/13101 ,  H01L2224/16245 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29034 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29169 ,  H01L2224/2929 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2924/0665

Abstract: A packaged IC wherein a portion of the sidewalls of the packaged IC are solderable metal. A method of forming a packaged IC wherein a portion of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal. A method of forming a packaged IC wherein all of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal and a portion of sidewall of the molding compound is solderable metal.

公开(公告)号：US09054092B2

公开(公告)日：2015-06-09

申请号：US14064671

申请日：2013-10-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bernardo Gallegos ,  Yong Lin

IPC: H01L23/48 ,  H01L23/495

CPC classification number: H01L23/49558 ,  H01L23/49541 ,  H01L23/49548 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method and apparatus of minimizing resin bleed and mold flash on integrated lead finishes by providing groves on the external leads that can control the length of resin bleed.

Abstract translation: 通过在可以控制树脂流失长度的外部引线上提供树脂，使集成铅涂层上的树脂渗出和模具闪光最小化的方法和装置。