Invention Grant
- Patent Title: Suppression of back-gate transistors in RF CMOS switches built on an SOI substrate
-
Application No.: US15133669Application Date: 2016-04-20
-
Publication No.: US09806192B2Publication Date: 2017-10-31
- Inventor: Philip W. Mason , Michael Carroll , Julio C. Costa , Jan Edward Vandemeer , Daniel Charles Kerr
- Applicant: RF Micro Devices, Inc.
- Applicant Address: US NC Greensboro
- Assignee: Qorvo US, Inc.
- Current Assignee: Qorvo US, Inc.
- Current Assignee Address: US NC Greensboro
- Agency: Withrow & Terranova, P.L.L.C.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/092 ; H01L27/12 ; H01L23/66

Abstract:
The present disclosure relates to a silicon-on-insulator (SOI) substrate structure with a buried dielectric layer for radio frequency (RF) complementary metal-oxide semiconductor (CMOS) switch fabrications. The buried dielectric layer suppresses back-gate transistors in the RF CMOS switches fabricated on the SOI substrate structure. The SOI substrate structure includes a silicon handle layer, a silicon oxide layer over the silicon handle layer, a buried dielectric layer over the silicon oxide layer, and a silicon epitaxy layer directly over the buried dielectric layer.
Public/Granted literature
- US20160380101A1 SUPPRESSION OF BACK-GATE TRANSISTORS IN RF CMOS SWITCHES BUILT ON AN SOI SUBSTRATE Public/Granted day:2016-12-29
Information query
IPC分类: