- 专利标题: Methods of forming patterns of a semiconductor devices
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申请号: US15223710申请日: 2016-07-29
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公开(公告)号: US09837273B2公开(公告)日: 2017-12-05
- 发明人: Jong-Sub Lee , Kyoung-Ha Eom , Ha-Neul Lee , Sang-Gyo Chung
- 申请人: Samsung Electronics Co., Ltd.
- 申请人地址: KR Gyeonggi-Do
- 专利权人: SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人地址: KR Gyeonggi-Do
- 代理机构: Harness, Dickey & Pierce, P.L.C.
- 优先权: KR10-2015-0141499 20151008
- 主分类号: H01L21/033
- IPC分类号: H01L21/033 ; H01L21/311 ; H01L21/3213 ; H01L27/108
摘要:
A method of forming fine patterns of semiconductor devices is disclosed. The method comprises forming a hard mask layer on an etch target, which includes first and second regions. The hard mask layer may further have first and second preliminary mask patterns formed on the same. Furthermore, a spacer layer may be formed on the first and second preliminary mask patterns. The spacer layer and the first and second preliminary mask patterns may be partially removed to form first and second spacers on sidewalls of the first and second preliminary mask patterns, respectively. The second spacer in the second region may have a top surface higher than a top surface of the first spacer in the first region. The height differences between the spacers allow forming of first and second patterns in the first and second regions, and thereby forming fine patterns of semiconductor devices.
公开/授权文献
- US20170103891A1 METHODS OF FORMING PATTERNS OF A SEMICONDUCTOR DEVICES 公开/授权日:2017-04-13
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