Invention Grant
- Patent Title: Wafer back-side polishing system and method for integrated circuit device manufacturing processes
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Application No.: US15407893Application Date: 2017-01-17
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Publication No.: US09852899B2Publication Date: 2017-12-26
- Inventor: Shen-Nan Lee , Teng-Chun Tsai , Hsin-Hsien Lu , Chang-Sheng Lin , Kuo-Cheng Lien , Kuo-Yin Lin , Wen-Kuei Liu , Yu-Wei Chou
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik LLC
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/66 ; H01L21/67 ; B24B7/22 ; B24B9/06

Abstract:
Some embodiments are directed to a wafer polishing tool. The wafer polishing tool includes a first polisher, a second polisher downstream of the first polisher, a third polisher downstream of the second polisher, and a fourth polisher downstream of the third polisher. The first polisher receives a wafer having a front side and a back side with integrated circuit component devices disposed on the front side of the wafer, and polishes a center region on the back side of the wafer. The second polisher receives the wafer via transporting equipment and buffs the center region of the back side of the wafer. The third polisher receives the wafer via the transporting equipment and polishes a back side edge region of the wafer. The fourth polisher receives the wafer via the transporting equipment and buffs the back side edge region of the wafer.
Public/Granted literature
- US20170125237A1 WAFER BACK-SIDE POLISHING SYSTEM AND METHOD FOR INTEGRATED CIRCUIT DEVICE MANUFACTURING PROCESSES Public/Granted day:2017-05-04
Information query
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