The present disclosure relates to an integrated circuit (IC). The IC includes a substrate, which includes a periphery region having a first substrate surface and a memory cell region having a second substrate surface. The second substrate surface is recessed within the substrate relative to the first substrate surface. A high k metal gate (HKMG) transistor is disposed on the first substrate surface and includes a HKMG gate. Two neighboring flash memory cells are disposed on the second substrate surface and include a pair of flash memory cell control gates. Top surfaces of the HKMG gate and flash memory cell control gates are co-planar.