A processor includes a resource scheduler, a dispatcher, and a memory execution unit. The memory execution unit includes logic to identify an executed, unretired store operation in a memory ordered buffer, determine that the store operation is speculative, determine whether an associated cache line in a data cache is non-speculative, and determine whether to block a write of the store operation results to the data cache based upon the determination that the store operation is speculative and a determination that the associated cache line is non-speculative.