Invention Grant
- Patent Title: Planar III-V field effect transistor (FET) on dielectric layer
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Application No.: US15047871Application Date: 2016-02-19
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Publication No.: US09882021B2Publication Date: 2018-01-30
- Inventor: Cheng-Wei Cheng , Edward W. Kiewra , Amlan Majumdar , Uzma Rana , Devendra K. Sadana , Kuen-Ting Shiu , Yanning Sun
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Biletto, P.C.
- Agent Louis J. Percello
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/66 ; H01L21/762 ; H01L29/06 ; H01L29/20 ; H01L29/201 ; H01L29/786
Abstract:
A method of forming a semiconductor substrate including a type III-V semiconductor material directly on a dielectric material that includes forming a trench in a dielectric layer, and forming a via within the trench extending from a base of the trench to an exposed upper surface of an underlying semiconductor including substrate. A III-V semiconductor material is formed extending from the exposed upper surface of the semiconductor substrate filling at least a portion of the trench.
Public/Granted literature
- US20160172465A1 PLANAR III-V FIELD EFFECT TRANSISTOR (FET) ON DIELECTRIC LAYER Public/Granted day:2016-06-16
Information query
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