Invention Grant
- Patent Title: Three capacitor stack and associated methods
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Application No.: US15282504Application Date: 2016-09-30
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Publication No.: US09960224B2Publication Date: 2018-05-01
- Inventor: Eng Huat Goh , Jiun Hann Sir , Han Kung Chua , Min Suet Lim , Hoay Tien Teoh
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L49/02
- IPC: H01L49/02

Abstract:
A three capacitor stack and associated methods are shown. An exemplary capacitor device may include a first capacitor stack that includes a first plurality of layers of reference electrodes interleaved with first capacitor electrodes, a second capacitor stack on the first capacitor stack that includes a second plurality of layers of reference electrodes interleaved with second capacitor electrodes, and a third capacitor stack on the second capacitor stack that includes a reference electrode and a third capacitor electrode. A respective layer of dielectric material is formed between the reference electrodes and the first capacitor electrodes, the second capacitor electrodes, and the third capacitor electrode.
Public/Granted literature
- US20180097056A1 THREE CAPACITOR STACK AND ASSOCIATED METHODS Public/Granted day:2018-04-05
Information query
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