Invention Grant
- Patent Title: Clock jitter measurement circuit and semiconductor device including the same
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Application No.: US15432731Application Date: 2017-02-14
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Publication No.: US09989588B2Publication Date: 2018-06-05
- Inventor: Kang-yeop Choo , Hyun-ik Kim , Tae-ik Kim , Ji-hyun Kim , Woo-seok Kim
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2016-0087117 20160708
- Main IPC: H03L7/06
- IPC: H03L7/06 ; G01R31/317 ; H03L7/091 ; H03L7/183

Abstract:
A circuit for measuring clock jitter includes: an internal signal generator configured to generate an internal clock signal and a single pulse signal, respectively synchronized with an input clock signal; a plurality of delay units being connected in series with each other and configured to generate respective delayed clock signals; a plurality of latch circuits configured to latch the single pulse signal in synchronization with the respective delayed clock signals, and output sampling signals; and a count sub-circuit configured to output a count value resulting from counting a number of active sampling signals of the sampling signals.
Public/Granted literature
- US20180011142A1 CLOCK JITTER MEASUREMENT CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME Public/Granted day:2018-01-11
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