公开(公告)号：US09989588B2

公开(公告)日：2018-06-05

申请号：US15432731

申请日：2017-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kang-yeop Choo ,  Hyun-ik Kim ,  Tae-ik Kim ,  Ji-hyun Kim ,  Woo-seok Kim

IPC: H03L7/06 ,  G01R31/317 ,  H03L7/091 ,  H03L7/183

CPC classification number: G01R31/31709 ,  H03K5/1565 ,  H03L7/091 ,  H03L7/183

Abstract: A circuit for measuring clock jitter includes: an internal signal generator configured to generate an internal clock signal and a single pulse signal, respectively synchronized with an input clock signal; a plurality of delay units being connected in series with each other and configured to generate respective delayed clock signals; a plurality of latch circuits configured to latch the single pulse signal in synchronization with the respective delayed clock signals, and output sampling signals; and a count sub-circuit configured to output a count value resulting from counting a number of active sampling signals of the sampling signals.