Invention Grant
- Patent Title: Memory with margin current addition and related methods
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Application No.: US15476618Application Date: 2017-03-31
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Publication No.: US09991000B2Publication Date: 2018-06-05
- Inventor: Emanuela Calvetti , Marcella Carissimi , Marco Pasotti
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza (MB)
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza (MB)
- Agency: Slater Matsil, LLP
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C16/24 ; G11C16/26 ; G11C16/34 ; G11C16/10 ; G11C13/00 ; G11C11/16

Abstract:
In accordance with an embodiment, a circuit includes a sense amplifier circuit configured to sense a difference between a first current based on a direct memory bit and a second current based on a complementary memory bit. The direct memory bit is coupled to a first input of the sense amplifier circuit, and the complementary memory bit is coupled to a second input of the sense amplifier circuit. A controller is configured to, during a sense operation, selectively add a first margin current to the first current, and during the sense operation, selectively add a second margin current to the second current.
Public/Granted literature
- US20180040380A1 MEMORY WITH MARGIN CURRENT ADDITION AND RELATED METHODS Public/Granted day:2018-02-08
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