Invention Grant
- Patent Title: Method of manufacturing semiconductor package
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Application No.: US15094125Application Date: 2016-04-08
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Publication No.: US09997477B2Publication Date: 2018-06-12
- Inventor: Tsung-Hsien Tsai , Heng-Cheng Chu , Chien-Cheng Lin , Chih-Hsien Chiu , Hsin-Lung Chung , Yude Chu
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW102102301A 20130122
- Main IPC: H01L23/66
- IPC: H01L23/66 ; H01L49/02 ; H01L23/64 ; H01L23/00 ; H01L25/16 ; H01L25/00 ; H01L21/56 ; H01L23/31

Abstract:
A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
Public/Granted literature
- US20160225728A1 METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE Public/Granted day:2016-08-04
Information query
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