Invention Application
- Patent Title: SINGLE PIN MULTILEVEL INTEGRATED CIRCUIT TEST INTERFACE
- Patent Title (中): 单引脚多路集成电路测试接口
-
Application No.: PCT/IB0302380Application Date: 2003-06-19
-
Publication No.: WO2004001568A3Publication Date: 2004-03-18
- Inventor: DE WINTER RUDI
- Applicant: MELEXIS NV , DE WINTER RUDI
- Assignee: MELEXIS NV,DE WINTER RUDI
- Current Assignee: MELEXIS NV,DE WINTER RUDI
- Priority: GB0214516 2002-06-21
- Main IPC: G01R31/317
- IPC: G01R31/317 ; G01R31/3185 ; G11C7/10 ; G11C29/48 ; H03K19/173
Abstract:
An integrated circuit (102) comprises one or more integrated circuit elements which may interact with other circuitry via one or more input/output pins. In the present invention the circuit elements include and interface element (101) for interfacing with external test circuitry. The interface element communicates with the external test circuitry via a single input/output pin (201) dedicated for testing.
Information query
