Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE HAVING SEALANT BRIDGE
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Application No.: PCT/US2017/040490Application Date: 2017-06-30
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Publication No.: WO2019005154A1Publication Date: 2019-01-03
- Inventor: THANU, Dinesh Padmanabhan Ramalekshmi , DHAVALESWARAPU, Hemanth K. , GUTHIKONDA, Venkata Suresh , BEATTY, John J. , AN, Yonghao , AYALA, Marco Aurelio Cartas , GARNER, Luke J. , PENG, Li
- Applicant: INTEL CORPORATION
- Applicant Address: 2200 Mission College Boulevard Santa Clara, California 95054 US
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: 2200 Mission College Boulevard Santa Clara, California 95054 US
- Agency: BRASK, Justin, K. et al.
- Main IPC: H01L23/40
- IPC: H01L23/40 ; H01L23/36 ; H01L23/482 ; H01L25/065
Abstract:
Semiconductor packages having a sealant bridge between an integrated heat spreader and a package substrate are described. In an embodiment, a semiconductor package includes a sealant bridge anchoring the integrated heat spreader to the package substrate at locations within an overhang gap laterally between a semiconductor die and a sidewall of the integrated heat spreader. The sealant bridge extends between a top wall of the integrated heat spreader and a die side component, such as a functional electronic component or a non-functional component, or a satellite chip on the package substrate. The sealant bridge modulates warpage or stress in thermal interface material joints to reduce thermal degradation of the semiconductor package.
Information query
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