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10 条记录 (耗时 0.013 秒)

    SYSTEM AND METHOD OF MESSAGE-BASED POWER MANAGEMENT
    1.
    发明公开
    SYSTEM AND METHOD OF MESSAGE-BASED POWER MANAGEMENT 审中-公开
    系统和方法基于消息的电源控制

    公开(公告)号：EP1609047A1

    公开(公告)日：2005-12-28

    申请号：EP04711800.5

    申请日：2004-02-17

    申请人： INTEL CORPORATION

    发明人： NAVEH, Alon ,  KUMAR, Mohan ,  GUTMAN, Mickey ,  MARTWICK, Andrew ,  SOLOMON, Gary

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3287 ,  G06F1/3203 ,  G06F1/3209 ,  H04L12/40039 ,  Y02D10/171

    摘要： Briefly, system and method for message-based power management which may be used, for example, in computer systems and communications networks. Embodiments of the present invention may include, for example, a device connected to a power management controller (PMC); the device and/or the PMC may send, receive, and/or process power management event (PME) messages. Embodiments of the present invention may operate using links in communicative and/or non-communicative modes. Embodiments of the present invention may include a switch, to send/receive, process, create, re-format and/or route one or more PME message on behalf of various devices, for example, a Peripheral Component Interconnect (PCI) device.

    AUTONOMOUS INITIALIZATION OF NON-VOLATILE RANDOM ACCESS MEMORY IN A COMPUTER SYSTEM
    2.
    发明公开
    AUTONOMOUS INITIALIZATION OF NON-VOLATILE RANDOM ACCESS MEMORY IN A COMPUTER SYSTEM 审中-公开
    在计算机系统无关的初始化不挥发RAM存储器单元

    公开(公告)号：EP2761465A1

    公开(公告)日：2014-08-06

    申请号：EP11873192.6

    申请日：2011-09-30

    申请人： Intel Corporation

    发明人： NACHIMUTHU, Murugasamy, K. ,  KUMAR, Mohan ,  ZIAKAS, Dimitrios

    IPC分类号： G06F12/00 ,  G06F13/14 ,  G06F13/16 ,  G06F9/22

    CPC分类号： G06F12/0246 ,  G06F9/4403

    摘要： A non-volatile random access memory (NVRAM) is used in a computer system to store information that allows the NVRAM to autonomously initialize itself at power-on. The computer system includes a processor, an NVRAM controller coupled to the processor, and an NVRAM that comprises the NVRAM controller. The NVRAM is byte-rewritable and byte-erasable by the processor. The NVRAM stores a memory interface table containing information for the NVRAM controller to autonomously initialize the NVRAM upon power-on of the computer system without interacting with the processor and firmware outside of the NVRAM. The information is provided by the NVRAM controller to the processor to allow the processor to access the NVRAM.

    SYSTEM AND METHOD OF MESSAGE-BASED POWER MANAGEMENT
    7.
    发明授权
    SYSTEM AND METHOD OF MESSAGE-BASED POWER MANAGEMENT 审中-公开

    公开(公告)号：EP1609047B1

    公开(公告)日：2018-12-26

    申请号：EP04711800.5

    申请日：2004-02-17

    申请人： Intel Corporation

    发明人： NAVEH, Alon ,  KUMAR, Mohan ,  GUTMAN, Mickey ,  MARTWICK, Andrew ,  SOLOMON, Gary

    IPC分类号： G06F1/32 ,  H04L12/40

    CPC分类号： G06F1/3287 ,  G06F1/3203 ,  G06F1/3209 ,  H04L12/40039 ,  Y02D10/171

    摘要： Briefly, system and method for message-based power management which may be used, for example, in computer systems and communications networks. Embodiments of the present invention may include, for example, a device connected to a power management controller (PMC); the device and/or the PMC may send, receive, and/or process power management event (PME) messages. Embodiments of the present invention may operate using links in communicative and/or non-communicative modes. Embodiments of the present invention may include a switch, to send/receive, process, create, re-format and/or route one or more PME message on behalf of various devices, for example, a Peripheral Component Interconnect (PCI) device.

    DEVICE REPRESENTATION APPARATUS AND METHODS
    9.
    发明公开
    DEVICE REPRESENTATION APPARATUS AND METHODS 审中-公开
    设备表示装置和方法

    公开(公告)号：EP1573526A2

    公开(公告)日：2005-09-14

    申请号：EP03755846.7

    申请日：2003-09-19

    申请人： INTEL CORPORATION

    发明人： KAUSHIK, Shiv ,  CROSSLAND, James ,  KUMAR, Mohan ,  RANKIN, Linda ,  O'SHEA, David

    IPC分类号： G06F9/445

    CPC分类号： G06F9/4411

    摘要： An apparatus and system may include a peripheral device, such as an interrupt controller or Peripheral Component Interconnect (PCI) bridge device, having a memory-mapped legacy register and a PCI dummy register. The legacy register may be accessed by a Basic Input/Output System (BIOS) as part of a power-on initialization sequence for the peripheral device, and the dummy register may be accessed during a hot-plug operation using code executed by an Operating System (OS). An article, including a machine-accessible medium, may contain data capable of causing a machine to carry out a method of representing a peripheral device which includes identifying the peripheral device as a legacy device in a name space, such as an Advanced Configuration and Power Interface (ACPI) name space, and identifying the peripheral device as a dummy PCI device capable of being accessed during a hot-plug operation.

    摘要翻译： 装置和系统可以包括具有存储器映射的传统寄存器和PCI虚拟寄存器的外围设备，诸如中断控制器或外围组件互连（PCI）桥设备。 作为外围设备的上电初始化序列的一部分，传统寄存器可以由基本输入/输出系统（BIOS）访问，并且虚拟寄存器可以在热插拔操作期间使用由操作系统 （OS）。 包括机器可访问介质的文章可以包含能够使机器执行表示外围设备的方法的数据，其包括将外围设备标识为名称空间中的传统设备，诸如高级配置和功率 接口（ACPI）名称空间，并将外围设备标识为能够在热插拔操作期间访问的虚设PCI设备。

    DYNAMIC DISCOVERY OF WIRELESS PERIPHERALS
    10.
    发明公开
    DYNAMIC DISCOVERY OF WIRELESS PERIPHERALS 失效
    无线外设的动态DISCOVERY

    公开(公告)号：EP1010069A1

    公开(公告)日：2000-06-21

    申请号：EP98928929.3

    申请日：1998-06-09

    申请人： INTEL CORPORATION

    发明人： PAWLOWSKI, Stephen, S. ,  KUMAR, Mohan ,  ACKELSON, David, E.

    IPC分类号： G06F9/445

    CPC分类号： G06F3/038 ,  G06F1/3228 ,  G06F9/4411 ,  G06F2203/0384

    摘要： A 'Plug and Play' type dynamic detection and binding capability for wireless peripheral devices is disclosed. The dynamic detection and binding of wireless peripherals is achieved without manual intervention, and without modifications to the host computing device's built-in operation system (BIOS). Dynamic detection and binding of a wireless peripheral device by a host is accomplished by transmitting a Device_Hail message (405), waiting for a Hail_Response message (425) from a peripheral, and, upon the reception of a Hail_Response message (425), assigning a Peripheral Address to the responding peripheral and transmitting it to the peripheral in a Peripheral_Address_Allocation message (430).