Generation of accurate phase and amplitude matched signals
    2.
    发明公开
    Generation of accurate phase and amplitude matched signals 审中-公开
    具有准确的相位和振幅平衡产生信号

    公开(公告)号:EP1764912A3

    公开(公告)日:2009-01-28

    申请号:EP06120371.7

    申请日:2006-09-08

    摘要: A circuit architecture for generation of amplitude and phase matched signals is described, which is primarily intended for the generation of quadrature signals, for example local oscillator signals, as required in many electronic systems. Using a single reference signal as an input, two output signals are generated at the same frequency. The relative amplitudes of these signals contain phase error information. An error signal is derived by amplitude comparison, and then fed back to a phase control element in a closed loop manner. The method proposed ensures that when the output amplitudes are equal then the output signals will be in phase quadrature. All signal processing is performed at the fundamental frequency, enabling wider bandwidth and higher frequency operation to be achieved, than could otherwise be realised using standard circuits based on frequency dividers.

    SENDEANORDNUNG, INSBESONDERE FÜR DEN MOBILFUNK
    5.
    发明公开
    SENDEANORDNUNG, INSBESONDERE FÜR DEN MOBILFUNK 有权
    传输设置,尤其是移动

    公开(公告)号:EP1425846A2

    公开(公告)日:2004-06-09

    申请号:EP02774345.9

    申请日:2002-09-12

    发明人: SIMON, Martin

    IPC分类号: H03D1/00

    CPC分类号: H03C3/406 H03D7/165

    摘要: Disclosed is a transmitter arrangement, especially for mobile radio, comprising a quadrature modulator (1) with an upstream digital signal processing unit (2). In order to curb sideband and carrier frequency which can occur as a result of over-large pairing tolerances of the components used, a feedback path (3) is provided in the inventive arrangement in order to couple the modulator output to the digital signal processing unit (2) and to provide the envelope of the transmitter signal in order to create pre-distortion in the digital signal processing unit (2). According to the invention, the envelope is provided by means of an AD-converter (12), preferably with undersampling, or by means of a down mixer (15), respectively in the feedback path (3).

    Modulation system capable of accurately compensating for nonlinearities of an amplifier connected thereto
    8.
    发明公开
    Modulation system capable of accurately compensating for nonlinearities of an amplifier connected thereto 失效
    ,是能够补偿相关联的放大器准确调制装置的非线性。

    公开(公告)号:EP0588444A1

    公开(公告)日:1994-03-23

    申请号:EP93203126.3

    申请日:1990-01-05

    申请人: NEC CORPORATION

    摘要: A modulation system responsive to a sampled signal (31) of a sampling rate for supplying a modulated analog signal to an amplifier having nonlinearities to make the amplifier produce an amplified output signal, in which a processing arrangement (36) processes the signal with reference to a difference between the signal and an additional digital signal (35) to compensate for the nonlinearities to produce a processed signal. The processed signal is modulated into the modulated analog signal. The amplified output signal is demodulated and converted into the additional digital signal by a converter (40). Otherwise, the second control signal is produced. A controller (78) may control a phase of a sampling signal supplied to the converter so that a quotient of the difference by a differential of the selected signal becomes equal to zero.

    摘要翻译: 响应于采样速率为在放大器供给的经调制的模拟信号,以具有非线性,使在放大的输出信号的放大器产生,其中处理装置(36),参照处理该信号到一个采样信号(31)的调制系统 的信号之间,并附加数字信号(35)的差来补偿非线性以产生经处理的信号。 处理后的信号被调制成调制的模拟信号。 放大后的输出信号进行解调并通过一个转换器(40)转换成附加的数字信号。 否则,该第二控制信号产生。 控制器(78)可以控制提供给转换器的采样信号的相位所以没有由所选择的信号的差分的差的商变为等于零。

    CONTROLLED SLEW RATE AMPLIFIER
    9.
    发明公开
    CONTROLLED SLEW RATE AMPLIFIER 失效
    AMP摆率控制。

    公开(公告)号:EP0507919A1

    公开(公告)日:1992-10-14

    申请号:EP91919545.0

    申请日:1991-09-10

    申请人: MOTOROLA, INC.

    发明人: GAILUS, Paul, H.

    IPC分类号: H03G3 H03C3 H03G5

    CPC分类号: H03G3/3036 H03C3/406 H03G5/24

    摘要: Amplificateur à vitesse de réponse variable (26) dans l'étage d'entrée d'un circuit d'amplificateur (10) permettant de réduire l'interférence de la fréquence du canal décalé. Lorsque des séquences d'essai sont introduites dans un circuit d'amplificateur, pour servir à mesurer les niveaux d'entrée maximum autorisés pour l'amplificateur (34), l'introduction d'un amplificateur à faible vitesse de réponse dans la boucle d'entrée empêche ensuite la production d'une interférence de la fréquence du canal décalé provoquée par la séquence d'essai introduite. L'amplificateur à vitesse de réponse réglable (26) fonctionne à pleine vitesse de réponse, ce qui assure une amplification de toute la largeur de bande, pendant les périodes normales de fonctionnement du circuit.

    VERFAHREN ZUM ABGLEICHEN EINES ELEKTRONISCHEN SYSTEMS
    10.
    发明公开
    VERFAHREN ZUM ABGLEICHEN EINES ELEKTRONISCHEN SYSTEMS 审中-公开
    调整方法的电子系统

    公开(公告)号:EP1992090A1

    公开(公告)日:2008-11-19

    申请号:EP07786425.4

    申请日:2007-07-30

    发明人: FRANKE, Reiner

    IPC分类号: H04B17/00 H03C3/00 H04L27/36

    CPC分类号: H04L27/36 H03C3/406 H04B17/21

    摘要: The invention relates to a method for trimming an electronic system (200) in which n parameters (x, y) of the system (200) can be predetermined, which correspond to an n-dimensional trimming area, with two limit values (x0, XI y0, yl) being predetermined for each parameter (x, y) at the start of the trimming process, which limit values bound a corresponding output area (B_O) in the n-dimensional trimming area, and in which the following steps are repeated until a terminate condition is reached: - evaluation (100) of a target function which quantifies the reaching of a trimming target for the limit values (x0, xl, yϑ, yl), which bound the output area (B_O), with the evaluation comprising the measurement and/or evlauation of at least one physical variable of the system (200) which is dependent on the respective parameter (x, y) and/or its limit value (x0, xl, y0, yl), and with corresponding target function values associated with the limit values being obtained, - definition (110) of a changed, in particular reduced, output area (B_l, B_2) for a subsequent iteration as a function of the resultant target function values. According to the invention, the target function values are allocated to two different classes, with all the target function values which correspond to one target criterion being allocated to a first class, and with all the target function values which do not correspond to the target criterion being allocated to a second class, and with the changed output areas (B_l, B_2) being defined for the next iteration as a function of those target function values which are allocated to the first class.