摘要:
Various embodiments provide for systems and methods for signal conversion of one modulated signal to another modulated signal using demodulation and then re-modulation. According to some embodiments, a signal receiving system may comprise an I/Q demodulator that demodulates a first modulated signal to an in-phase ("I") signal and a quadrature ("Q") signal, an I/Q signal adjuster that adaptively adjusts the Q signal to increase the signal-to-noise ratio (SNR) of a transitory signal that is based on a second modulated signal, and an I/Q modulator that modulates the I signal and the adjusted Q signal to the second modulated signal. To increase the SNR, the Q signal may be adjusted based on a calculated error determined for the transitory signal during demodulation by a demodulator downstream from the I/Q modulator.
摘要:
A circuit architecture for generation of amplitude and phase matched signals is described, which is primarily intended for the generation of quadrature signals, for example local oscillator signals, as required in many electronic systems. Using a single reference signal as an input, two output signals are generated at the same frequency. The relative amplitudes of these signals contain phase error information. An error signal is derived by amplitude comparison, and then fed back to a phase control element in a closed loop manner. The method proposed ensures that when the output amplitudes are equal then the output signals will be in phase quadrature. All signal processing is performed at the fundamental frequency, enabling wider bandwidth and higher frequency operation to be achieved, than could otherwise be realised using standard circuits based on frequency dividers.
摘要:
A method and system for determining at least one DC offset compensation value used to suppress carrier leakage occurring on real and imaginary signal paths in an analog radio transmitter when a significant temperature change in the transmitter is detected. At least one DC offset signal having a level that corresponds to the at least one DC offset compensation value is provided to a digital DC offset compensation module which adjusts the DC level of at least one of the real and imaginary signal paths.
摘要:
A transmitter chain has a quadrature modulator, a variable gain amplifier, an up-converter, and a variable gain power amplifier. An overall phase of the transmitter chain is adjusted on the basis of pre-stored phase information reflecting phase changes due to simultaneous gain changes of gains of at least the variable gain amplifier and the variable gain power amplifier.
摘要:
Disclosed is a transmitter arrangement, especially for mobile radio, comprising a quadrature modulator (1) with an upstream digital signal processing unit (2). In order to curb sideband and carrier frequency which can occur as a result of over-large pairing tolerances of the components used, a feedback path (3) is provided in the inventive arrangement in order to couple the modulator output to the digital signal processing unit (2) and to provide the envelope of the transmitter signal in order to create pre-distortion in the digital signal processing unit (2). According to the invention, the envelope is provided by means of an AD-converter (12), preferably with undersampling, or by means of a down mixer (15), respectively in the feedback path (3).
摘要:
A modulation system responsive to a sampled signal (31) of a sampling rate for supplying a modulated analog signal to an amplifier having nonlinearities to make the amplifier produce an amplified output signal, in which a processing arrangement (36) processes the signal with reference to a difference between the signal and an additional digital signal (35) to compensate for the nonlinearities to produce a processed signal. The processed signal is modulated into the modulated analog signal. The amplified output signal is demodulated and converted into the additional digital signal by a converter (40). Otherwise, the second control signal is produced. A controller (78) may control a phase of a sampling signal supplied to the converter so that a quotient of the difference by a differential of the selected signal becomes equal to zero.
摘要:
Amplificateur à vitesse de réponse variable (26) dans l'étage d'entrée d'un circuit d'amplificateur (10) permettant de réduire l'interférence de la fréquence du canal décalé. Lorsque des séquences d'essai sont introduites dans un circuit d'amplificateur, pour servir à mesurer les niveaux d'entrée maximum autorisés pour l'amplificateur (34), l'introduction d'un amplificateur à faible vitesse de réponse dans la boucle d'entrée empêche ensuite la production d'une interférence de la fréquence du canal décalé provoquée par la séquence d'essai introduite. L'amplificateur à vitesse de réponse réglable (26) fonctionne à pleine vitesse de réponse, ce qui assure une amplification de toute la largeur de bande, pendant les périodes normales de fonctionnement du circuit.
摘要:
The invention relates to a method for trimming an electronic system (200) in which n parameters (x, y) of the system (200) can be predetermined, which correspond to an n-dimensional trimming area, with two limit values (x0, XI y0, yl) being predetermined for each parameter (x, y) at the start of the trimming process, which limit values bound a corresponding output area (B_O) in the n-dimensional trimming area, and in which the following steps are repeated until a terminate condition is reached: - evaluation (100) of a target function which quantifies the reaching of a trimming target for the limit values (x0, xl, yϑ, yl), which bound the output area (B_O), with the evaluation comprising the measurement and/or evlauation of at least one physical variable of the system (200) which is dependent on the respective parameter (x, y) and/or its limit value (x0, xl, y0, yl), and with corresponding target function values associated with the limit values being obtained, - definition (110) of a changed, in particular reduced, output area (B_l, B_2) for a subsequent iteration as a function of the resultant target function values. According to the invention, the target function values are allocated to two different classes, with all the target function values which correspond to one target criterion being allocated to a first class, and with all the target function values which do not correspond to the target criterion being allocated to a second class, and with the changed output areas (B_l, B_2) being defined for the next iteration as a function of those target function values which are allocated to the first class.