公开(公告)号：EP4066378A1

公开(公告)日：2022-10-05

申请号：EP20893135.2

申请日：2020-11-24

Applicant: Tubis Technology Inc.

Inventor： WU, Kenny Kun-Long

IPC: H03C3/40 ,  H03C3/14 ,  H03C3/22

公开(公告)号：EP2101407A3

公开(公告)日：2013-10-23

申请号：EP09154426.2

申请日：2009-03-05

Applicant: Intel Mobile Communications GmbH

Inventor： Van Waasen, Stefan

IPC: H03C5/00 ,  H03C1/36 ,  H03D7/14 ,  H03D7/16 ,  H03M1/00 ,  H03C3/40

CPC classification number: H03C5/00 ,  H03C1/36 ,  H03C3/40 ,  H03D7/1441 ,  H03D7/165 ,  H03D2200/0052

Abstract: Circuitry (314, 316, 318, 320) separates a modulation signal into digital sign (S4, S7) and magnitude (S5, S6) signal components. The digital magnitude signal is converted to an analog magnitude signal. The analog magnitude signal is then mixed with an in-phase (IC) or quadrature (QC) carrier signal under the influence of the digital sign signal (S4, S7) and routed to a driver output stage (332).

公开(公告)号：EP2176948A1

公开(公告)日：2010-04-21

申请号：EP08773379.6

申请日：2008-06-10

Applicant: Rohde & Schwarz GmbH & Co. KG

Inventor： RICHT, Norbert ,  LORENZ, Petr

IPC: H03C3/40 ,  H03C5/00 ,  H03D7/16 ,  H04L27/36

CPC classification number: H03C3/40 ,  H04L27/12 ,  H04L27/32 ,  H04L27/362

Abstract: In order to produce a broadband-frequency-modulated output signal s (S3), the carrier frequency (fc) of which can be adjusted in a wide frequency range, a frequency-modulated signal (S1) is produced at any desired fixed carrier frequency (fo), is then converted to IQ signals (Si2,Sq2), and the IQ signals produced in this way are then combined with the desired carrier frequency (fc) by IQ modulation to form the frequency-modulated output signal. IQ signals that are produced are preferably low-pass-filtered before IQ modulation.

公开(公告)号：EP1766797A1

公开(公告)日：2007-03-28

申请号：EP05763227.5

申请日：2005-06-23

Applicant: Silicon Laboratories, Inc.

Inventor： WELLAND, David R. ,  WANG, Caiyi

IPC: H04B1/40 ,  H04L27/36 ,  H03C3/40

CPC classification number: H04B1/406 ,  H03D3/007

Abstract: Mixing circuitry for quadrature processing in communication systems and related methods are disclosed. The weighted mixing circuitry allows for arbitrary dividers to be utilized in generating the mixing signals for quadrature processing and thereby provides a significant advantage over prior architectures where 90 degree offset I and Q mixing signals were needed for quadrature mixing.

公开(公告)号：EP1611688A4

公开(公告)日：2006-05-31

申请号：EP04713753

申请日：2004-02-23

Applicant: SILICON LAB INC

Inventor： JOHNSON RICHARD A

IPC: H04B1/00 ,  H03C3/40 ,  H03D7/14 ,  H03D7/16

CPC classification number: H03D7/1441 ,  H03C3/403 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/1483 ,  H03D7/166 ,  H03D2200/0043 ,  H03D2200/0047 ,  H03D2200/009

Abstract: A tuner architecture (100) is disclosed that mixes an analog RF input signal (302) and a digital local oscillator signal (306) to generate a output signal (304) at a desired IF frequency, including low-IF and zero-IF solutions. The tuner provides a number of advantages over previous implementations, such as improved performance for low-IF and zero-IF architectures and a significant reduction in interference between adjacent paths in a multiple tuner solution. Other features and variations can be implemented, if desired, and related methods can be utilized, as well.

公开(公告)号：EP1646142A1

公开(公告)日：2006-04-12

申请号：EP04023958.4

申请日：2004-10-07

Applicant: Infineon Technologies AG

Inventor： Rudberg, Mikael

IPC: H03C3/40

CPC classification number: H03C3/40 ,  G06F1/0335 ,  G06F1/0342 ,  H03C2200/0079

Abstract: The present invention relates to a system (10) for digital frequency conversion, intended for use in a radio system. The system (10) comprises a frequency synthesis means (30) connected to a table look-up means, both operable to give approximation of a sinusoid. The system (10) also comprises a Taylor expansion means (16) connected to said table look-up means, which is operable to perform a vector rotation, thereby improving the accuracy of the sinusoid.

公开(公告)号：EP1619848A1

公开(公告)日：2006-01-25

申请号：EP04291852.4

申请日：2004-07-21

Applicant: Evolium S.A.S.

Inventor： Schütz, Thomas

IPC: H04L27/36 ,  H03C3/40

CPC classification number: H04L27/364 ,  H03C3/406 ,  H04W52/0229 ,  Y02D70/1222

Abstract: The present invention relates to a radio frequency transmitter (1) comprising an I/Q modulator (2) for obtaining a modulated output signal (2a) from an in-phase signal (I) and a quadrature phase signal (Q), and an I/Q modulator control loop (3b, 3c) controlling (130) said I/Q modulator (2), characterized by an activation switch (3a) capable of activating/deactivating said I/Q modulator control loop (3b, 3c).
The present invention also relates to a method of operating a radio frequency transmitter (1) comprising an I/Q modulator (2) for obtaining a modulated output signal (2a) from an in-phase signal (I) and a quadrature phase signal (Q), an I/Q modulator control loop (3b, 3c) controlling (130) said I/Q modulator (2), characterized by activating (120) said I/Q modulator control loop (3b, 3c) if a suitable calibration signal is supplied to said transmitter (1).

Abstract translation: 本发明涉及一种射频发射机（1），其包括用于从同相信号（I）和正交相位信号（Q）获得调制输出信号（2a）的I / Q调制器（2） 控制（130）所述I / Q调制器（2）的I / Q调制器控制环路（3b，3c），其特征在于能够激活/去激活所述I / Q调制器控制环路（3b，3c）的激活开关（3a）。 本发明还涉及一种操作射频发射机（1）的方法，该射频发射机（1）包括用于从同相信号（I）和正交相位信号（I）获得调制输出信号（2a）的I / Q调制器（2） 控制（130）所述I / Q调制器（2）的I / Q调制器控制回路（3b，3c），其特征在于如果适当的校准（120）激活（120）所述I / Q调制器控制回路（3b，3c） 信号被提供给所述发射器（1）。

公开(公告)号：EP1535391A1

公开(公告)日：2005-06-01

申请号：EP03788239.6

申请日：2003-07-24

Applicant: Intel Corporation

Inventor： DINUR, Nati

IPC: H03C3/40 ,  H03C1/06

CPC classification number: H03D3/009 ,  H03C1/06 ,  H03C3/406

Abstract: Briefly, a method and apparatus to compensate an imbalance of a modulator by providing calibration parameters to a calibration network. The modulator may receive a pair of predetermined sinusoidal in-phase and quadrature signals and output a distorted modulated signal. A processor may process spectral parameters at first and second harmonics of a detected envelope signal of the distorted modulated signal may generate the calibration parameters.

公开(公告)号：EP1407540A2

公开(公告)日：2004-04-14

申请号：EP01987254.8

申请日：2001-10-31

Applicant: QUALCOMM INCORPORATED

Inventor： PERSICO, Charles, J. ,  JAFFEE, James ,  CICCARELLI, Steven, C.

IPC: H03C3/40

CPC classification number: H03D7/166 ,  H03D7/165

Abstract: In an exemplary application, an apparatus according to a disclosed embodiment receives a radio frequency signal and outputs an intermediate frequency signal. Rejection of image components in the intermediate frequency signal is obtained without the need to preprocess the radio frequency signal with an image reject filter. Such an apparatus may also exhibit an image rejection performance that is robust to frequency deviation of a local oscillator.

公开(公告)号：EP1315283A3

公开(公告)日：2004-03-31

申请号：EP02019254.8

申请日：1994-04-21

Applicant: Nokia Corporation

Inventor： Mattila, Heikki ,  Matero, Jorma ,  Hulkko, Jaakko

IPC: H03C3/40 ,  H04B1/40

CPC classification number: H03C3/40 ,  H03C3/00 ,  H03D7/163

Abstract: A dual-mode radiotelephone terminal includes a π/4-shift DQPSK modulator (11). A dual-mode modulation is achieved by mixing an output of a transmitter oscillator (16) with an output of an offset oscillator (18) to form an injection signal (LO) at a final transmitter frequency, the injection signal being further modulated with a quadrature modulator in a digital mode of operation. In the analog mode of operation the transmitter oscillator or offset oscillator is frequency modulated and the quadrature modulator is disabled, thereby passing the frequency modulated injection signal without substantial attenuation. The LO signal is regenerated and also phase shifted with a circuit (35) having a frequency multiplier (30) and a frequency divider (34). The circuit outputs two local oscillator (LO) signals (LOA and LOB), each of which directly drives an associated quadrature mixer (36, 38) of the modulator. In a further embodiment of the invention the dual-mode radiotelephone terminal includes a VHF synthesizer (23), a UHF synthesizer (21), and a local oscillator (4C) that provides a signal only when operating in the analog receiving mode. The local oscillator signal is mixed with a first IF signal for providing a second IF signal when operating in the analog receiving mode or in a standby mode. The first IF frequency is provided by a standard IF filter (45 MHz) when operating in either the digital or the analog mode of operation. The output of the VHF synthesizer is divided (22) and used as an input to a mixer (4F) that provides a second IF signal when operating in the digital receiving mode. A control signal is employed for selectively enabling and disabling various of these components as a function of the operating mode, thereby conserving power.