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    ELECTRONIC DEVICE AND OPERATION METHOD THEREOF
    147.
    发明公开
    ELECTRONIC DEVICE AND OPERATION METHOD THEREOF 审中-实审

    公开(公告)号：EP4408021A1

    公开(公告)日：2024-07-31

    申请号：EP22887448.3

    申请日：2022-10-17

    申请人： Samsung Electronics Co., Ltd.

    发明人： JIN, Juyeon ,  CHEONG, Gupil ,  KIM, Sanghyeok ,  KANG, Doosuk

    IPC分类号： H04R3/00 ,  H04R5/04 ,  H03K19/00 ,  H04W4/80 ,  H04W52/02 ,  H04S7/00

    CPC分类号： H04W52/02 ,  H04R5/04 ,  H03K19/00 ,  H04W4/80 ,  H04R3/00 ,  H04S7/00

    摘要： Disclosed is an electronic device including a microphone, a communication circuit, a memory, and a processor operatively connected to the microphone, the communication circuit, and the memory. The memory may store one or more instructions, when executed by the processor, cause the electronic device to receive an audio data request from a first external electronic device through the communication circuit, generate a first audio packet using audio data acquired through the microphone in the same time period as a second external electronic device connected through the communication circuit, based on a specified condition, insert, into the first audio packet, information for comparing the first audio packet with a second audio packet generated by the second external electronic device in terms of generation order, and transmit the first audio packet to the first external electronic device through the communication circuit. In addition to the above, various embodiments identified through the specification are possible.

    A MULTI-LEVEL DIGITAL STEP ATTENUATOR AND DIGITAL STEP ATTENUATION DEVICE
    148.
    发明公开
    A MULTI-LEVEL DIGITAL STEP ATTENUATOR AND DIGITAL STEP ATTENUATION DEVICE 审中-公开

    公开(公告)号：EP4407870A1

    公开(公告)日：2024-07-31

    申请号：EP24152638.3

    申请日：2024-01-18

    申请人： MediaTek Inc.

    发明人： TSENG, Wei-Hsin ,  WANG, Jhen-Kai

    IPC分类号： H03H7/25 ,  H03G1/00

    CPC分类号： H03H7/25 ,  H03G1/0088

    摘要： A multi-level digital step attenuator (DSA) with a hybrid attenuation circuit is shown. The hybrid attenuation circuit is coupled between an input node and an output node of the multi-level DSA. The bypass switch of the multi-level DSA is controlled to provide a bypass path between the input node and the output node of the of the multi-level DSA when the hybrid attenuation circuit is in a disabled state. In the first active state, the hybrid attenuation circuit is switched to form a T-type structure to provide a first amount of signal attenuation. In the second active state, the hybrid attenuation circuit is switched to form a Pi-type structure to provide a second amount of signal attenuation.