RFID verifier system with grade classification
    21.
    发明公开
    RFID verifier system with grade classification 审中-公开
    RFID-PrüfsystemmitGüteklasse-Klassifizierung

    公开(公告)号:EP1643412A1

    公开(公告)日:2006-04-05

    申请号:EP05255990.3

    申请日:2005-09-26

    申请人: Printronix, Inc.

    IPC分类号: G06K7/00

    摘要: An RFID verifier includes a transmit signal strength indicator (TSSI) and a receive signal strength indicator (RSSI). Using the TSSI, the RFID verifier may determine the amount of power an interrogated RFID tag is illuminated with. Similarly, using the RSSI , the RFID verifier may determine the amount of power returned to the RFID verifier by the RFID tag. By processing the returned power and the illuminating power with a transfer function, the RFID verifier may provide an absolute indicia of quality for the interrogated RFID tag.

    摘要翻译: RFID验证器包括发射信号强度指示符(TSSI)和接收信号强度指示符(RSSI)。 使用TSSI,RFID验证器可以确定询问的RFID标签被照亮的功率量。 类似地,使用RSSI,RFID验证器可以确定由RFID标签返回到RFID验证器的功率量。 通过利用传送功能处理返回的功率和照明功率,RFID验证器可以为询问的RFID标签提供质量的绝对标记。

    A NETWORK ANALYZING METHOD AND A NETWORK ANALYZING APPARATUS
    22.
    发明公开
    A NETWORK ANALYZING METHOD AND A NETWORK ANALYZING APPARATUS 审中-公开
    网络分析方法和网络解析装置

    公开(公告)号:EP1629388A1

    公开(公告)日:2006-03-01

    申请号:EP04754136.2

    申请日:2004-06-03

    发明人: HARADA, Koji

    IPC分类号: G06F13/00 G01R31/28

    摘要: A network analyzing apparatus (100) and method for analyzing the network properties of a device under test (20) to which modulated signals are applied including modulating data contained in output signals (10) of the device under test (20), generating modulated signals (140) based on demodulated data and setting data supplied in advance, outputting the modulated signals as reference signals, and analyzing (150) the network properties of the device under test (20) by comparing or referencing the output signals of the device under test and these reference signals.

    PERFORMANCE BOARD AND TEST SYSTEM
    23.
    发明公开
    PERFORMANCE BOARD AND TEST SYSTEM 审中-公开
    性能测试系统

    公开(公告)号:EP1542028A1

    公开(公告)日:2005-06-15

    申请号:EP03788703.1

    申请日:2003-09-17

    IPC分类号: G01R31/28

    摘要: A performance board for allowing a device under test and a testing apparatus to be electrically coupled with each other, includes a base substrate on which the device under test is mounted, a first adaptor part provided with a plurality of coaxial connectors for allowing a plurality of coaxial cables electrically coupled to a plurality of first pins of the device under test respectively and the testing apparatus to be electrically coupled with each other and a second adaptor part provided with a plurality of via holes for allowing a plurality of wirings electrically coupled to a plurality of second pins of the device under test respectively and the testing apparatus to be electrically coupled with each other.

    摘要翻译: 一种用于允许被测设备和测试设备彼此电耦合的性能板,包括:安装有被测设备的基底;第一适配器部件,其具有多个同轴连接器,用于允许多个 同轴电缆分别电耦合到被测器件的多个第一引脚,并且测试装置彼此电耦合;以及第二适配器部件,其具有多个通孔,用于允许电耦合到多个的多个布线 分别被测器件的第二引脚和测试装置相互电耦合。

    NON-LINEAR TRANSMISSION LINE USING VARACTORS AND NON-PARALLEL WAVEGUIDE
    24.
    发明公开
    NON-LINEAR TRANSMISSION LINE USING VARACTORS AND NON-PARALLEL WAVEGUIDE 审中-公开
    使用变容二极管非线性转换头和非并行波导

    公开(公告)号:EP1520319A2

    公开(公告)日:2005-04-06

    申请号:EP02776434.9

    申请日:2002-10-31

    IPC分类号: H01P1/00

    摘要: An ultrafast sampling system includes an interposer and a sampler that include a series of Schottky diodes configured with a non-parallel waveguide to form shocklines or nonlinear transmission line (NLTLs) that produce a differential strobe pulse. The shocklines are defined by non-parallel conductors that are configured as, for example, triangular, dentate, arcuate, or other shapes, or as conductors that have edges that are triangular, dentate, arcuate, or the like. The conductors are defined with respect to a substrate, and are airbridged so that at least some portions of the conductors are displaced from the substrate to reduce waveguide capacitance. Electrical connection to the sampler is made with airline having an inner conductor that is deformable to contact an input pad defined on the sampler.

    Method and apparatus for integrated testing of a system containing digital and radio frequency circuits
    27.
    发明公开
    Method and apparatus for integrated testing of a system containing digital and radio frequency circuits 失效
    含数字和RF电路的方法和设备,用于一个系统的集成测试

    公开(公告)号:EP0706271A3

    公开(公告)日:1999-03-24

    申请号:EP95306640.4

    申请日:1995-09-20

    申请人: AT&T Corp.

    IPC分类号: H04B17/00

    摘要: A method is provided for accomplishing unified testing of a digital/RF system (10'), comprised of a digital controller (14), a base-band processor (20), an RF transmitter (24) and an RF receiver (34). The digital portion of the digital/RF system (10'), including the digital controller (14) and the base-band processor (20), is tested by a digital test technique such as Boundary-Scan testing. Test patterns for the RF elements are down-loaded from the digital controller (14) to the base-band processor via a Boundary-Scan Test Access Port (TAP). Thereafter, the RF transmitter (24) and the RF receiver (34) are tested by applying the test patterns from the base-band processor to the RF transmitter for transmission thereby. The signal produced by the RF transmitter (24) in response to the applied test pattern is converted to a first digital signal stream for processing by the base-band processor (20) to determine the operability of the transmitter. The signal produced by the RF transmitter (24) is also received by the RF receiver (34) for demodulation thereby. The demodulated receiver signal is then converted to a second signal stream for input to the base-band processor to determine the operability of the receiver.

    Dispositif de mesure des caractéristiques d'un composant hyperfréquence
    29.
    发明公开
    Dispositif de mesure des caractéristiques d'un composant hyperfréquence 失效
    一种用于测量的设计用于非常高的频率成分的特征变量的设备。

    公开(公告)号:EP0273825A1

    公开(公告)日:1988-07-06

    申请号:EP87402913.5

    申请日:1987-12-18

    IPC分类号: G01R31/28 G01R1/24 H01P1/00

    CPC分类号: H01P1/00 G01R1/24 G01R31/2822

    摘要: L'invention concerne un dispositif qui, fixé sur un appareil de mesure, permet d'avoir accès aux bornes d'un composant hyperfréquence, pour mesure de ses paramètres "S".
    En vue d'avoir les liaisons les plus courtes entre les lignes d'accès (4 + 7) du dispositif et les bornes d'entrée et sortie du composant (24) à mesurer, l'invention prévoit que les deux blocs d'accès (1, 2), qui portent les lignes d'accès, sont réglables en position, par rapport au composant (24) à mesurer, selon deux degrés de liberté, en écartement et en translation latérale. Le composant à mesurer, quelque soit son type (puce, en boitier, en circuit hybride) est porté par un bloc (17), inséré entre les deux blocs d'accès (1, 2), et de dimensions égales à celles du composant (24).
    Applications aux mesures des paramètres "S", du bruit, de la puissance, en hyperfréquences.

    Electronic test apparatus with ambient-cryogenic temperature interface
    30.
    发明公开
    Electronic test apparatus with ambient-cryogenic temperature interface 失效
    随环境温度一部分,并与Kryogentemperatur的部分之间的链接的电子测试装置。

    公开(公告)号:EP0106196A1

    公开(公告)日:1984-04-25

    申请号:EP83109315.8

    申请日:1983-09-20

    IPC分类号: G01R31/28 F17C13/00

    摘要: This test apparatus permits the testing of high speed semiconductor devices (room-temperature chips) by a Josephson junction sampling device (cryogenic chip) without intolerable loss of resolution.
    The interface comprises a quartz pass-through plug which includes a planar transmission line (5) interconnecting a first chip station, where the semiconductor chip (2) to be tested is temporarily mounted and a second chip station, where the cryogenic chip (1) is mounted. The pass-through plug has a long half-cylindrical portion (3) and short half-cylindrical portion (4). The long portion carries the planar transmission line, the ends of which form the first and second chip mounting stations. The short portion completes the cylinder with the long portion for part of its length, where a seal (6) can be achieved, but does not extend over the chip mounting stations. Sealing is by epoxy cement. The pass- through plug is sealed in place in a flange mounted to the chamber wall.
    The first chip station is in the room temperature environment required for semiconductor operation. The second chip station, with the cryogenic chip attached, extends into a liquid helium reservoir. Proper semiconductor operating temperature is achieved by a heater wire (8) and control thermocouple (9) in the vicinity of each other and the second chip mounting station. Thermal isolation is main- I tained by vacuum and seals. Connections for power and control, for test result signals, for temperature control and heating, and for vacuum complete the test apparatus.

    摘要翻译: 此测试装置permist高速半导体装置(室温芯片)由约瑟夫逊结取样装置(低温芯片)的测试,而不分辨率的不可容忍的损失。 ... 所述接口包括石英直通插头,其包括平面传输线(5)相互连接的第一芯片站,其中待测试的半导体芯片(2)被临时安装和第二芯片站,其中,所述 低温芯片(1)被安装。 直通插头具有长半圆柱形protion(3)和短的半圆柱形部分(4)。 细长部承载平面传输线,其端部形成第一和第二芯片安装台。 短部完成与长部的气缸为它的长度,其中,密封件(6)能够实现的一部分,但不延伸在芯片安装台。 密封是由环氧水泥。 直通插头中安装到所述腔室壁的凸缘密封就位。 ... 第一芯片站处于用于半导体操作所需的室温环境中。 第二芯片站,与低温芯片附接,延伸到液体氦贮存。 合适半导体的工作温度是通过在海誓山盟附近的加热器线(8)和控制热电偶(9)和所述第二芯片安装台实现。 热绝缘是通过真空和密封件保持。 连接用于供电和控制,对测试结果信号,用于温度控制和加热,以及用于真空完成测试装置。