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公开(公告)号：EP1374396A4
公开(公告)日：2007-12-12
申请号：EP02757825
申请日：2002-03-28
发明人： JEONG HOE-SAM , LEE SEUNG-WOOK , LEE WON-SEOK , PARK JOONBAE , LEE KYEONGHO
CPC分类号： H03F1/223 , H03F3/195 , H03F3/72 , H03F2200/294 , H03F2200/378 , H03F2200/391 , H03F2200/451 , H03F2203/7236 , H03G1/0088
摘要： A variable gain, low noise amplifier is described, which is suitable as the input amplifier for a wireless terminal, or as the pre-amplifier stage of a wireless terminal transmitter. The amplifier (MN1) may achieve variable gain by deploying a network of transistors (MP1-MPn) in a parallel array, each independently selectable by a PMOS switch (220), and providing the variable resistance for the resonant circuit (Rp, Lp). Power dissipation can also be mitigated by using a network of driving transistors, each independently selectable by a PMOS switch (220). The resonant frequency of the amplifier may be made tunable by providing a selection of optional pull-up capacitors (Cp'1-Cp'n).
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32.发明公开
公开(公告)号：EP1374439A4
公开(公告)日：2007-04-18
申请号：EP02757777
申请日：2002-03-27
发明人： KANG SUWON , LEE JEONG-WOO , PARK JOONBAE , LEE KYEONGHO
CPC分类号： H03G3/3068
摘要： A wireless or wired communication system and method is provided including a transmitter and a receiver. A RF communication system in accordance with the present invention includes an apparatus and gain control method between RF receiver (803) and baseband modem (804) in case of a plurality of gain stages (830, 846, 862) inside a receiver (803). The gain of each stage (830, 846, 862) can be controlled by an integrated gain controller (828). The gain controller (828) monitors the signal level of each gain stage (830, 846, 862) to place its gain to optimal value. The gain control apparatus and method can be implemented in a digital AGC system. The gain controller (828) accepts a signal (826) implementing gain control and thus there is no stability issue. When distributed gain stages are present inside a related art receiver and separate gain control loops are used, stability issues can arise.
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公开(公告)号：EP1735907A2
公开(公告)日：2006-12-27
申请号：EP05725392.4
申请日：2005-03-10
发明人： PARK, Joonbae , LEE, Seung-Wook , LEE, Jeong-Woo , LEE, Kyeongho
IPC分类号： H03F3/45
CPC分类号： H03F3/211 , H03F3/45475 , H03F3/45659 , H03F2203/45136 , H03F2203/45138 , H03F2203/45166 , H03F2203/45168 , H03F2203/45434 , H03F2203/45522 , H03F2203/45591
摘要： A variable-gain amplifier circuit uses a pair of single-ended operational amplifiers (100, 110) to amplify complementary portions of a differential input signal (IN, INB). By using two single-ended amplifiers (100, 110) instead of a single differential amplifier, linearity is significantly improved. In addition, common mode feedback circuitry is eliminated along with harmonic distortion and other forms of noise which tend to negative affect the quality of the signal output from the circuit.
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34.发明公开
公开(公告)号：EP1716634A1
公开(公告)日：2006-11-02
申请号：EP05764681.2
申请日：2005-01-13
发明人： LEE, Kang, Yoon , KOO, Yido , LEE, Jeong-Woo , PARK, Joonbae , LEE, Kyeongho
IPC分类号： H03B5/00
CPC分类号： H03L7/085 , H03L7/099 , H03L7/1976 , H03L7/199
摘要： Tuning methods and apparatuses for LC oscillators are disclosed. Embodiments of the present invention include an adaptively controlling the bitcomparison time to provide the smallest coarse tuning time. The bit comparison time is scaled inversely to the amount of redundancy of corresponding weighted capacitors in a capacitor array of the LC oscillator.
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35.发明公开INTEGRATED CIRCUIT PACKAGE HAVING AN INDUCTANCE LOOP FORMED FROM A MULTI-LOOP CONFIGURATION 审中-公开具有单多个环路配置进行电感回路综合SCHALTUNGSKAPSELUNG
公开(公告)号：EP1665383A2
公开(公告)日：2006-06-07
申请号：EP04782300.0
申请日：2004-08-27
发明人： KOO, Yido , HUH, Hyungki , LEE, Kang Yoon , LEE, Jeong-Woo , PARK, Joonbae , LEE, Kyeongho
IPC分类号： H01L29/00
CPC分类号： H01L23/642 , H01L23/645 , H01L24/48 , H01L24/49 , H01L2224/05553 , H01L2224/48091 , H01L2224/49111 , H01L2224/49113 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01033 , H01L2924/01043 , H01L2924/01076 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15192 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2224/45099 , H01L2224/05599
摘要： An integrated circuit package includes an inductance loop formed from a connection of lead wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from first and second wires which connect a first bonding pad on the integrated circuit chip to a first I/O pin of the package and a third and fourth wires which connect a second bonding pad on the chip to a second I/O pin of the package. To complete the inductor loop, the first and second I/O pins are connected by a third conductor between the pins. The third conductor may include one or more bonding wires and the I/O pins are preferably ones which are adjacent one another. However, the loop may be formed from non-adjacent connections of I/O pins based, for example, on loop-length requirements, space considerations, and/or other design or functional factors. In another embodiment, connection between the first and second I/O pins is established by making the I/O pins have a unitary construction. In another embodiment, connection between the first and second I/O pins is established by a metallization layer located either on the surface of the package substrate or within this substrate. By forming the inductor loop within the limits of the integrated circuit package, a substantial reduction in space requirements is realized, which, in turn, promotes miniaturization. Also, the integrated circuit may be implemented in any one of a variety of systems, at least one parameter of which is controlled by the length of the inductor loop of the package.
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36.发明公开
公开(公告)号：EP1557019A4
公开(公告)日：2006-06-07
申请号：EP03779213
申请日：2003-10-23
发明人： PARK JOONBAE , LEE KYEONGHO , SONG EUNSEOK , JUNG YEONJAE
CPC分类号： H04B1/109
摘要： A communications receiver includes a baseband signal recovery circuit which uses a low-IF architecture for data reception. The baseband signal recovery circuit uses a full-analog implementation for channel selection and filtering. Thus, the overhead placed on the design of analog-to-digital converter is greatly relaxed and most of hardware can be re-used for multi-mode applications with only a slight modification.
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37.发明公开BIDIRECTIONAL TURBO ISI CANCELLER-BASED DSSS RECEIVER FOR HIGH-SPEED WIRELESS LAN 审中-公开双向涡轮ISI基于消除器的高速无线局域网DSSS接收器
公开(公告)号：EP1556959A2
公开(公告)日：2005-07-27
申请号：EP03777906.3
申请日：2003-10-24
发明人： KIM, Byoung-Hoon , KANG, Suwon , CHO, Bong Youl , LEE, Kyeongho
IPC分类号： H04B1/00
CPC分类号： H04B1/7097 , H04B1/7115 , H04L25/03171
摘要： A bidirectional turbo ISI canceller cancels precursor-ISI as well as postcursor-ISI in a received signal without incorporating a multiplicative feedforward equalization filter. This is accomplished by taking a three-step receiver design approach. In the first step, an optimal single-symbol RAKE receiver is designed to comprise a CMF, a codeword correlator bank, and an energy bias (EB) canceller under the assumption that no ISI is generated by preceding or trailing symbols. In a second step, a DFE is included for suppressing postcursor-ISI caused by a preceding symbol. Finally, a precursor ISI canceler is used to remove the remaining ISI caused by a trailing symbol. All three components may be integrated into a BTIC-based receiver applying turbo-iteration processing.
摘要翻译： 双向turbo ISI消除器取消接收信号中的前驱-ISI（94）以及后驱-ISI（90），而不包含乘法前馈均衡滤波器。 这是通过采用三步接收机设计方法来完成的。 在第一步中，最佳单符号RAKE接收机被设计为包括CMF（9），码字相关器组和能量偏置EB（15）消除器，其假设前面或后面的符号没有产生ISI 。 在第二步中，包含DFE（16）用于抑制由前面的符号引起的后继-ISI（90）。 最后，前兆-ISI（94）消除器被用于去除由尾随符号引起的剩余ISI。 所有三个组件都可以被集成到应用涡轮迭代处理的基于BTIC的接收机中。
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38.发明公开AN ADAPTIVE LINEARIZATION TECHNIQUE FOR COMMUNICATION BUILDING BLOCK 审中-公开自适应线性化技术促进KOMMUNIKATIONSBAUBLOCK
公开(公告)号：EP1433250A4
公开(公告)日：2004-12-29
申请号：EP02759481
申请日：2002-08-29
发明人： JEONG HEI-SAM , PARK JOONBAE , LEE KYEONGHO
CPC分类号： H03F1/3223 , H03F1/3229
摘要： The present invention is directed to a linearization apparatus and method. Preferred embodiments according to the present invention can combine an auxiliary non-linear block (300) to a functional block of a system to increase linearity of an output signal (520) of the system such as a communication system. System overhead due to the non-linear auxiliary block can be small because of circuit structure, cost and low consumption. Further, the non-linear auxiliary block can be designed so that no feedback path is required. Further preferred embodiments can use a feedback path without loss of stability by using a cancellation apparatus or process based on an averaging detection of the output signal. For example, a feedback loop can detect power leakage in a sideband caused by non-linearities of the communication system.
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