公开(公告)号：EP2755401B1

公开(公告)日：2018-12-26

申请号：EP12829997.1

申请日：2012-08-29

申请人： Omron Corporation

发明人： KURATANI, Naoto

IPC分类号： H04R1/04 ,  H01L23/00 ,  H01L25/00 ,  H04R1/02 ,  H04R1/06 ,  H04R19/04 ,  H05K9/00 ,  B81B7/00 ,  H01L23/04 ,  H01L23/552 ,  H04R19/00

CPC分类号： B81B7/0064 ,  B81B2201/0257 ,  H01L23/04 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/16151 ,  H01L2924/163 ,  H01L2924/3011 ,  H01L2924/3025 ,  H04R1/04 ,  H04R1/086 ,  H04R19/005 ,  H04R19/04 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package is formed by vertically stacking a cover (44) and a substrate (45). A microphone chip (42) is mounted at the top surface of a concave portion (46) provided to the cover (44), and a circuit element (43) is mounted on the upper surface of the substrate (45). The microphone chip (42) is connected to a pad (48) on the lower surface of the cover by a bonding wire (50). The circuit element (43) is connected to a pad on the upper surface of the substrate by a bonding wire. A cover-side joining portion (49) in conduction with the pad (48) on the lower surface of the cover, and a substrate-side joining portion (69) in conduction with the pad on the upper surface of the substrate, are joined by a conductive material (86). A conductive layer (55) for electromagnetic shielding is embedded inside the cover (44) near the bonding pad (48) and the cover-side joining portion (49).

公开(公告)号：EP1570572B1

公开(公告)日：2018-12-26

申请号：EP03790018.0

申请日：2003-11-24

申请人： Cree, Inc.

发明人： PENGELLY, Raymond, Sydney ,  WOOD, Simon, Maurice ,  QUINN, John, Phillip

IPC分类号： H03F3/68

CPC分类号： H03F3/602 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L2223/6644 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： Disclosed are a multi-chip power amplifier comprising a plurality chips with each chip being a transistor amplifier, and a housing in which all of the semiconductor chips are mounted. A plurality of input leads extend into the housing and a plurality of output leads extend from the housing. A plurality of first matching networks couple a semiconductor chip to an input lead and a plurality of second matching networks couple each semiconductor chip to an output lead whereby each chip has its own input lead and output lead. By providing all amplifier chips within a single housing with matching networks within the housing coupling the chips to the input and output leads, manufacturing cost is reduced and the overall package footprint on a mounting substrate is reduced. Further, the close proximity of the chips within the housing reduces phase differences among signals in the semiconductor chips.

公开(公告)号：EP1657750B1

公开(公告)日：2018-12-05

申请号：EP04745370.9

申请日：2004-05-27

申请人： SANKEN ELECTRIC CO., LTD.

发明人： KANAZAWA, Masaki, Sanken Electric Co., Ltd.

IPC分类号： H01L25/07 ,  H01L25/16 ,  H01L23/495

CPC分类号： H01L25/071 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is provided which comprises a heat-radiative support plate 5; and first and second semiconductor elements 1 and 2 mounted and layered on support plate 5 for alternate switching of first and second semiconductor elements 1 and 2. The arrangement of piling and securing first and second semiconductor elements 1 and 2 on support plate 5 improves integration degree of semiconductor elements 1 and 2, and reduces the occupation area on support plate 5. Alternate switching of first and second semiconductor elements 1 and 2 controls heat produced from first and second semiconductor elements 1 and 2 because one of first and second semiconductor elements 1 and 2 is turned on, while the other is turned off.

公开(公告)号：EP1417711B1

公开(公告)日：2018-12-05

申请号：EP02779602.8

申请日：2002-07-31

申请人： VALEO EQUIPEMENTS ELECTRIQUES MOTEUR

发明人： THERY, Laurent ,  LECOLE, Brice

IPC分类号： H01L25/07 ,  H01L23/49 ,  H01L23/492 ,  H01L23/373

CPC分类号： H01L24/32 ,  H01L23/3735 ,  H01L23/492 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/48992 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01058 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01088 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

公开(公告)号：EP2711996B1

公开(公告)日：2018-11-21

申请号：EP13185571.0

申请日：2013-09-23

申请人： LG Innotek Co., Ltd.

发明人： Lee, Kwang Chil ,  Park, Joong Seo ,  Lee, Tae Lim ,  Choi, Woon Kyung ,  Kim, Kyoung Hoon ,  Park, Hae Jin ,  Yun, Hwan Hui

IPC分类号： H01L33/22 ,  H01L33/20

CPC分类号： H01L33/58 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32 ,  H01L2224/13 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/00011 ,  H01L2224/45099

摘要： Disclosed is a light emitting device including an active layer emitting light with a wavelength band of 200 nm to 405 nm, and a light-transmitting layer disposed on the active layer, the light-transmitting layer having a lower part facing the active layer, wherein at least one of side and upper parts of the light-transmitting layer has a surface-processed pattern portion.

公开(公告)号：EP3017470B1

公开(公告)日：2018-10-24

申请号：EP14735474.0

申请日：2014-07-02

申请人： Rosenberger Hochfrequenztechnik GmbH & Co. KG

发明人： CAHILL, Sean S. ,  SANJUAN, Eric A.

IPC分类号： H01L21/60 ,  H01L23/49 ,  H01L23/66 ,  H01L23/50

CPC分类号： H01L23/49541 ,  H01L21/4821 ,  H01L21/4846 ,  H01L23/49506 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/64 ,  H01L23/645 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2223/6611 ,  H01L2224/45541 ,  H01L2224/4555 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49052 ,  H01L2224/85444 ,  H01L2224/8592 ,  H01L2224/8593 ,  H01L2224/85931 ,  H01L2224/85935 ,  H01L2224/85939 ,  H01L2224/85947 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30111 ,  H01L2924/20654 ,  H01L2224/45099 ,  H01L2924/00

摘要： A die package having a plurality of connection pads, a die substrate supporting a plurality of connection elements, a first lead having a first metal core with a first core diameter, and a dielectric layer surrounding the first metal core, the dielectric layer having a first dielectric thickness that varies along its length and/or the dielectric layer having an outer metal layer at least partially surrounding the dielectric layer, for selectively modifying the electrical characteristics of the lead.

公开(公告)号：EP2996834B1

公开(公告)日：2018-10-17

申请号：EP14723424.9

申请日：2014-05-12

申请人： Schunk Sonosystems GmbH

发明人： STROH, Dieter

IPC分类号： B23K20/10 ,  B29C65/08 ,  B29C65/00 ,  H01L23/00 ,  H01R43/02

CPC分类号： G01L5/0076 ,  B23K20/10 ,  B23K2101/32 ,  B23K2101/38 ,  B29C65/08 ,  B29C66/90 ,  H01L24/78 ,  H01L2224/78 ,  H01L2924/00014 ,  H01R43/0207 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

公开(公告)号：EP2596531B1

公开(公告)日：2018-10-03

申请号：EP11749029.2

申请日：2011-07-18

申请人： Marvell World Trade Ltd.

发明人： SUTARDJA, Sehat ,  WU, Albert ,  WU, Scott

IPC分类号： H01L25/18 ,  H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L25/50 ,  H01L23/12 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/25 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/92224 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present disclosure provide a method that comprises providing a first die having a surface comprising a bond pad to route electrical signals of the first die and attaching the first die to a layer of a substrate. The method further comprises forming one or more additional layers of the substrate to embed the first die in the substrate and coupling a second die to the one or more additional layers, the second die having a surface comprising a bond pad to route electrical signals of the second die. The second die is coupled to the one or more additional layers such that electrical signals are routed between the first die and the second die.

公开(公告)号：EP2130222B1

公开(公告)日：2018-09-05

申请号：EP08709986.7

申请日：2008-02-11

申请人： III Holdings 6, LLC

发明人： HERES, Klass ,  DIJKSTRA, Paul ,  NOLLEN, Maarten

IPC分类号： H01L23/31 ,  H01L23/495

CPC分类号： H01L23/3121 ,  H01L21/4832 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/244 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A carrier (100) for bonding a semiconductor chip (114) onto is provided, wherein the carrier (100) comprises a die pad (101) and a plurality of contact pads (102), wherein each of the plurality of contact pads (102) comprises an electrically conductive multilayer stack, wherein the electrically conductive multilayer stack comprises a surface layer (109), a first buffer layer, and a first conductive layer (108). Furthermore, the first buffer layer comprises a material adapted to prevent diffusion of material of the surface layer (109) into the first conductive layer (108), and at least two of the contact pads (102) has an ultrafine pitch relative to each other.

公开(公告)号：EP2543066B1

公开(公告)日：2018-08-22

申请号：EP11708620.7

申请日：2011-02-28

申请人： Qualcomm Incorporated

发明人： SWEENEY, Fifin ,  SHAH, Milind P. ,  VELEZ, Mario Francisco ,  GASTELUM, Damion B.

IPC分类号： H01L25/065 ,  H01L23/498 ,  H01L25/10 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L25/03 ,  H01L21/683

CPC分类号： H01L23/3677 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/25 ,  H01L24/48 ,  H01L24/82 ,  H01L25/03 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2518 ,  H01L2224/48091 ,  H01L2224/82001 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a multi-module integrated circuit package having a package substrate and package contacts, a die is embedded in the package substrate with thermal vias that couple hotspots on the embedded die to some of the package contacts.