公开(公告)号：EP0741366A2

公开(公告)日：1996-11-06

申请号：EP96106574.5

申请日：1996-04-25

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Shou, Guoliang ,  Motohashi, Kazunori ,  Luo, Jian ,  Takatori, Sunao ,  Yamamoto, Makoto

IPC分类号： G06J1/00

CPC分类号： G06J1/00

摘要： A multiplication circuit has two capacitive couplings connected first and second inverting amplifiers, respectively. Two steps of multiplication are performed by this circuit. Input is multiplied by a multiplier of a product of multipliers of the successive multiplication circuits, so the total multiplier can be rather large with similar capacitances to that of the conventional circuit.

公开(公告)号：EP0696804A2

公开(公告)日：1996-02-14

申请号：EP95112410.6

申请日：1995-08-07

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Shou, Guoliang ,  Motohashi, Kazunori ,  Yamamoto, Makoto ,  Takatori, Sunao

IPC分类号： G11C27/02

CPC分类号： G11C27/026 ,  G11C27/024

摘要： An analog input voltage is inputted to the first sampling and holding circuit and the second sampling and holding circuit is connected to an output of the first sampling and holding circuit. The output of the first and second sampling and holding circuits are inputted to a multiplexer which alternatively outputs the output of first sampling and holding circuit or the second sampling and holding circuit. When one of the first and second sampling and holding circuits is refreshed, the output of the other sampling holding circuit is selected to be outputted from the multiplexer.

摘要翻译： 模拟输入电压输入到第一采样保持电路，第二采样保持电路连接到第一采样保持电路的输出。 第一和第二采样和保持电路的输出被输入到多路复用器，该多路复用器输出第一采样和保持电路或第二采样和保持电路的输出。 当第一和第二取样和保持电路中的一个被刷新时，另一采样保持电路的输出被选择为从多路复用器输出。 $$

公开(公告)号：EP0435099B1

公开(公告)日：1995-10-18

申请号：EP90124142.2

申请日：1990-12-13

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Takatori, Sunao ,  Kumagai, Ryohei ,  Matsumoto, Koji ,  Yamamoto, Makoto

IPC分类号： G06F15/80

CPC分类号： G06K9/6228 ,  G06N3/02

公开(公告)号：EP0569856A3

公开(公告)日：1994-11-09

申请号：EP93107374.6

申请日：1993-05-06

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Yamamoto, Makoto

IPC分类号： H03M1/34

CPC分类号： H03M1/42

摘要： The present invention has an object to provide an A/D converter realized by a small size circuit. An A/D converter of this invention for generating a discrete output voltage with a plurality of levels in response to an input analog voltage comprises i) a plurality of FETs each of which corresponds to the level of the output voltage, each the FET having a plurality of gates for receiving outputs of the FETs levels upper than the FET, the input voltage and an offset voltage of negative value; ii) a voltage divider for generating the offset voltage of each the FET; iii) a plurality of inverters corresponding to each the FET for outputting a constant positive voltage in response to a negative output of the corresponding FET and for outputting a zero voltage in response to a positive output voltage of the corresponding FET.

公开(公告)号：EP0569858A3

公开(公告)日：1994-10-05

申请号：EP93107377.9

申请日：1993-05-06

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Yamamoto, Makoto

IPC分类号： G11C27/04 ,  G11C11/56

CPC分类号： G11C11/5621 ,  G11C27/04 ,  G11C2211/5644

摘要： The present invention has an object to provide a memory device for realizing an analog memory or a multilevel memory easy to produce and of small scale circuit. A memory device according to the present invention realizes the small scale cell by means of storing analog data by circulating data on a plural number of linear CCD arrays which store data by electrical charge, makes it possible to access in high speed by reading and writing data through cache memory which comprises a row address corresponding to CCD array, and by registering on an address register the address of the data in cache memory.

摘要翻译： 本发明的一个目的是提供一种用于实现易于生产的模拟存储器或多级存储器和小规模电路的存储器件。 根据本发明的存储器件通过在通过电荷存储数据的多个线性CCD阵列上循环数据来存储模拟数据来实现小型单元，使得可以通过读取和写入数据来高速访问 通过包括对应于CCD阵列的行地址的高速缓冲存储器，以及通过在地址寄存器上登记高速缓冲存储器中的数据的地址。

公开(公告)号：EP0571895A3

公开(公告)日：1994-03-30

申请号：EP93108222.6

申请日：1993-05-19

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Yamamoto, Makoto

IPC分类号： G06F15/68

CPC分类号： G06T5/002 ,  G06T1/60 ,  G06T5/10 ,  G06T5/20 ,  G06T2207/20056 ,  G06T2207/20192

摘要： It purposes to provide an image processing system with a function which had been dependent on an optical system in image data processing. This image processing system comprises; a multivalue memory for holding image data in a multivalue; a frequency analysis means for converting data in the multivalue memory into data of frequency components; a frequency memory for storing frequency components calculated in the frequency analysis means; and a converting means for shifting data in the frequency memory by the predetermined value in frequency and for inversely converting them into image data.

摘要翻译： 其目的是为图像处理系统提供依赖于图像数据处理中的光学系统的功能。 该图像处理系统包括： 一个多值存储器，用于保存多值图像数据; 频率分析装置，用于将多值存储器中的数据转换成频率分量的数据; 频率存储器，用于存储在频率分析装置中计算的频率分量; 以及一个转换装置，用于将频率存储器中的数据移动预定值的频率并将它们反相转换成图像数据。

公开(公告)号：EP0586914A2

公开(公告)日：1994-03-16

申请号：EP93112888.8

申请日：1993-08-11

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Shou, Guoliang ,  Takatori, Sunao ,  Yamamoto, Makoto

IPC分类号： H04N7/24

CPC分类号： H04N19/63

摘要： The present invention has a purpose to provide an image compression method for transmitting more image information.
This image compression method compresses a gray scale original image with a plurality of pixels comprising steps of: i) diminishing in size the gray scale image step by step so that a plurality of diminished images are generated, by the following steps; a) dividing an image to be diminished into a plurality of partial areas with substantially equal size to one another; b) calculating an mean pixel value of pixels in each partial area so that each mean pixel value is defined as a representative pixel value of each the partial area; and c) substituting the pixels of each the partial area by the one pixel with the representative pixel value; ii) enlarging in size the minimal diminished image of diminished images step by step so that a plurality of enlarged images are generated, by adding one pixel between adjacent two pixels of an image to be enlarged, the one pixel to be added having a pixel value of an average pixel value of the adjacent pixels; iii) comparing corresponding pixel values of the diminished image and enlarged image with equal size to each other so that a plurality of compared image are generated, each pixel value of the compared image being binary indicating which pixel value of the images is bigger than the other; iv) calculating an error coefficient for each enlarged image representing a total difference between the pixel value of enlarged image and the diminished image so that a plurality of error coefficients are generated; and v) representing the gray scale original image by the diminished images, compared images and error coefficients.

摘要翻译： 本发明的目的是提供一种传输更多图像信息的图像压缩方法。 该图像压缩方法用多个像素压缩灰度原始图像，该方法包括以下步骤：i）通过以下步骤逐步缩小灰度图像的尺寸以产生多个缩小的图像; a）将要缩小的图像分成彼此具有基本相同大小的多个局部区域; b）计算每个部分区域中的像素的平均像素值，使得每个平均像素值被定义为每个部分区域的代表性像素值; 以及c）用所述代表性像素值用所述一个像素代替每个所述部分区域的像素; ii）逐步放大缩小的图像的最小缩小图像的大小，从而通过在要放大的图像的相邻两个像素之间添加一个像素来生成多个放大图像，所述一个要添加的像素具有像素值 的相邻像素的平均像素值; iii）将缩小图像和放大图像的相应像素值相互大小相等地进行比较，从而生成多个比较图像，比较图像的每个像素值是二进制的，指示图像中的哪个像素值比另一个更大 ; iv）计算表示放大图像的像素值与缩小图像之间的总差异的每个放大图像的误差系数，从而生成多个误差系数; 和v）通过缩小的图像表示灰度原始图像，比较图像和误差系数。

公开(公告)号：EP0585491A1

公开(公告)日：1994-03-09

申请号：EP92121192.6

申请日：1992-12-11

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Shu, Guoliang ,  Yang, Weikang ,  Wongwarawipat, Wiwat ,  Takatori, Sunao ,  Yamamoto, Makoto

IPC分类号： H01L27/06

CPC分类号： H01L27/0629

摘要： A MOSFET wherein a gate of it, a source of it is grounded through high resistance, a source is connected to a drain, furthermore, an output capacitance is connected to the source.

摘要翻译： 一种MOSFET，其栅极的源极通过高电阻接地，源极连接到漏极，此外，输出电容连接到源极。

公开(公告)号：EP0584403A1

公开(公告)日：1994-03-02

申请号：EP92121191.8

申请日：1992-12-11

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Shu, Goliang ,  Yang, Weikang ,  Wongwarawipat, Wiwat ,  Takatori, Sunao ,  Yamamoto, Makoto

IPC分类号： H03K17/693 ,  G01R19/165

CPC分类号： G01R19/0038

摘要： A circuit calculating the minimum value comprising a plural number of pMOS (T1,T2,...), wherein the sources of the plural pMOS (T1,T2,...) are connected to a power source (-Vcc) with lower voltage than a drain, the drain is grounded through a high resistance (R), an input voltage (X,Y,...) is connected to each pMOS (T1,T2,...), and a common output (Do) is connected to a drain of each pMOS (T1,T2,...).

摘要翻译： 一种计算包括多个pMOS（T1，T2，...）的最小值的电路，其中多个pMOS（T1，T2，...）的源极连接到具有较低电平的电源（-Vcc） 电压低于漏极，漏极通过高电阻（R）接地，输入电压（X，Y，...）连接到每个pMOS（T1，T2，...）和公共输出（Do ）连接到每个pMOS（T1，T2，...）的漏极。

公开(公告)号：EP0571895A2

公开(公告)日：1993-12-01

申请号：EP93108222.6

申请日：1993-05-19

申请人： YOZAN INC. ,  SHARP KABUSHIKI KAISHA

发明人： Yamamoto, Makoto

IPC分类号： G06F15/68

CPC分类号： G06T5/002 ,  G06T1/60 ,  G06T5/10 ,  G06T5/20 ,  G06T2207/20056 ,  G06T2207/20192

摘要： It purposes to provide an image processing system with a function which had been dependent on an optical system in image data processing.
This image processing system comprises; a multivalue memory for holding image data in a multivalue; a frequency analysis means for converting data in the multivalue memory into data of frequency components; a frequency memory for storing frequency components calculated in the frequency analysis means; and a converting means for shifting data in the frequency memory by the predetermined value in frequency and for inversely converting them into image data.

摘要翻译： 其目的是提供具有依赖于图像数据处理中的光学系统的功能的图像处理系统。 该图像处理系统包括： 用于在多值中保存图像数据的多值存储器; 用于将多值存储器中的数据转换成频率分量的数据的频率分析装置; 频率存储器，用于存储在频率分析装置中计算的频率分量; 以及转换装置，用于将频率存储器中的数据频率移动预定值，并将其逆变换成图像数据。