Digital limiter
    41.
    发明公开
    Digital limiter 失效
    数字限制器。

    公开(公告)号:EP0173452A2

    公开(公告)日:1986-03-05

    申请号:EP85305281.9

    申请日:1985-07-24

    CPC classification number: H03G11/008

    Abstract: A soft digital limiter (2) for limiting an analog input signal (1) from a maximum expected range (61) to a useful range (60). The number (m) of desired levels of resolution in the limiter (2) is preselected to be any power of two. An analog-to-digital converter (9) converts the input analog signal (1) to a digital representation (20). The converter (9) has its input voltage rating matched to the maximum expected range (61) and its output resolution matched to the preselected degree (m) of resolution. In the preferred two's complement numbering system, the condition for the input signal (1) falling within the useful range (60) is that the most significant p + 1 bits of the digital representation (20) are all identical, where p is the number of bits required by the converter (9) to delineate that portion of the maximum expected range (61) outside of the useful range (60). A network of comparators (e.g., 38. 39) implements this condition.

    DECODING DEVICE, METHOD, AND PROGRAM
    43.
    发明公开
    DECODING DEVICE, METHOD, AND PROGRAM 审中-公开
    DECODIERUNGSVORRICHTUNG,-VERFAHREN UND -PROGRAMM

    公开(公告)号:EP3089161A4

    公开(公告)日:2017-07-12

    申请号:EP14873206

    申请日:2014-12-12

    Applicant: SONY CORP

    Abstract: The present technology relates to a decoding apparatus, a decoding method and a program which make it possible to obtain sound with higher quality. A demultiplexing circuit demultiplexes an input code string into a gain code string and a signal code string. A signal decoding circuit decodes the signal code string to output a time series signal. A gain decoding circuit decodes the gain code string. That is, the gain decoding circuit reads out gain values and gain inclination values at predetermined gain sample positions of the time series signal and interpolation mode information. An interpolation processing unit obtains a gain value at each sample position between two gain sample positions through linear interpolation or non-linear interpolation according to the interpolation mode based on the gain values and the gain inclination values. A gain applying circuit adjusts a gain of the time series signal based on the gain values. The present technology can be applied to a decoding apparatus.

    Abstract translation: 本技术涉及使得可以获得更高质量的声音的解码设备,解码方法和程序。 解复用电路将输入码串解复用为增益码串和信号码串。 信号解码电路解码信号码串以输出时间序列信号。 增益解码电路对增益码串进行解码。 即,增益解码电路读出时序信号和插值模式信息的预定增益采样位置处的增益值和增益倾斜值。 内插处理单元基于增益值和增益倾斜值,根据插值模式通过线性内插或非线性内插获得两个增益样本位置之间的每个样本位置处的增益值。 增益施加电路基于增益值来调整时间序列信号的增益。 本技术可以应用于解码设备。

    Method for signal conditioning in a processing apparatus and processing apparatus thereof
    44.
    发明公开
    Method for signal conditioning in a processing apparatus and processing apparatus thereof 审中-公开
    Verfahren zur Signalaufbereitung in einer Verarbeitungsvorrichtung und Verarbeitungsvorrichtungdafür

    公开(公告)号:EP2765704A1

    公开(公告)日:2014-08-13

    申请号:EP13305166.4

    申请日:2013-02-12

    Applicant: Alcatel Lucent

    CPC classification number: H03F1/3247 H03F3/24 H03G11/008 H04L27/368

    Abstract: The embodiments of the invention relate to a method for signal conditioning in a processing apparatus (PA1). The method contains the steps of generating a first signal (fw) with a predefined spectral bandwidth (BW), amplifying spectral components of said first signal (fw) with a frequency outside said predefined spectral bandwidth (BW) for obtaining an amplified first signal (fw_PE_OUT), processing said amplified first signal (fw_PE_OUT) for obtaining a second signal (fw_DAC_OUT), and attenuating spectral components of said second signal (fw_DAC_OUT) with a frequency outside said predefined spectral bandwidth (BW) for obtaining an attenuated second signal (fw_DE_OUT). The embodiments of the invention further relate to a processing apparatus (PA1), which executes the signal conditioning method.

    Abstract translation: 本发明的实施例涉及一种用于在处理装置(PA1)中进行信号调理的方法。 该方法包括以预定的频谱带宽(BW)产生第一信号(fw)的步骤,以超出所述预定频谱带宽(BW)的频率放大所述第一信号(fw)的频谱分量,以获得放大的第一信号 fw_PE_OUT),处理用于获得第二信号(fw_DAC_OUT)的所述放大的第一信号(fw_PE_OUT),以及在所述预定频谱带宽(BW)之外的频率衰减所述第二信号(fw_DAC_OUT)的频谱分量,以获得衰减的第二信号(fw_DE_OUT )。 本发明的实施例还涉及执行信号调节方法的处理装置(PA1)。

    Automatic gain control circuit and method for automatic gain control
    45.
    发明公开
    Automatic gain control circuit and method for automatic gain control 有权
    自动增益控制自动增益控制和方法

    公开(公告)号:EP2595312A1

    公开(公告)日:2013-05-22

    申请号:EP11189633.8

    申请日:2011-11-17

    Abstract: A method of attenuating an input signal to obtain an output signal is described. The method comprises receiving the input signal, attenuating the input signal with a gain factor to obtain the output signal, applying a filter having a frequency response with a frequency-dependent filter gain to at least one of a copy of the input signal and a copy of the output signal to obtain a filtered signal, the frequency-dependent filter gain being arranged to emphasize frequencies within a number N of predetermined frequency ranges, N>1; wherein the filter comprises a sequence ofN sub-filters, each one of the N sub-filters having a frequency response adapted to emphasize frequencies within a corresponding one of the N predetermined frequency ranges; determining a signal strength of the filtered signal, and determining the gain factor from at least the signal strength.

    Abstract translation: 描述衰减到输入信号以获得在输出信号的方法。 该方法包括:接收输入信号,具有增益因子衰减输入信号,以获得输出信号,施加具有与频率相关的滤波器增益的输入信号和副本的副本的至少一个的频率响应的滤波器 的输出信号以获得经滤波的信号的,依赖于频率的滤波器增益被设置成预定的频率范围的一个数N内强调的频率,N> 1; worin所述滤波器包括序列OFN子滤波器,具有频率响应angepasst到所述N个预定频率范围中的相应一个内强调的频率的N个子滤波器中的每一个; 确定性采矿经滤波的信号的信号强度,和确定从采矿至少信号强度的增益因子。

    CLASS D AUDIO AMPLIFIER
    50.
    发明公开
    CLASS D AUDIO AMPLIFIER 审中-公开
    KLASSE-D-AUDIOVERSTÄRKER

    公开(公告)号:EP2041866A1

    公开(公告)日:2009-04-01

    申请号:EP07789880.7

    申请日:2007-07-04

    Applicant: NXP B.V.

    Abstract: A class D amplifier (1) comprises an input unit (11) for receiving a digital input signal (Vin), a pulse shaping unit (12) for producing pulse shaped signals in dependence of the input signal (Vin), a comparator unit (13) for comparing the pulse shaped signals and producing a comparator signal, a driver unit (14) for producing driver signals in dependence of the comparator signal, a switching output unit (15) for producing a pulse width modulated output signal (Vout) in dependence of the driver signals, and a feedback unit (16) for feeding the output signal (Vout) back to the pulse shaping unit (12). The input unit (11) comprises a clipping control unit (10) for controlling the duty cycle of the pulse width modulated output signal (Vout).

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