Receiving apparatus and methods
    41.
    发明公开
    Receiving apparatus and methods 失效
    Empfangseinrichtungen und Empfangsverfahren

    公开(公告)号:EP0878933A1

    公开(公告)日:1998-11-18

    申请号:EP98303463.8

    申请日:1998-05-01

    申请人: SONY CORPORATION

    IPC分类号: H04L5/06 H04J11/00 H04J1/00

    摘要: A multiplication circuit is removed from a receiving apparatus which receives an orthogonally modulated information sequence. A real-number part and an imaginary-number part of a transmission parameter converted into a frequency range are input to respective hard determination circuits (143, 144). The hard determination circuits (143, 144) convert the respective components into 1-bit data in accordance with a predetermined threshold value. Differential decoding circuits (145, 146) differentially decode the real-number part and the imaginary-number part which have been converted into 1-bit data, respectively, and output the obtained data to cumulative addition circuits (147, 148). The cumulative addition circuits (147, 148) cumulatively add the differentially demodulated data and supply it to respective identification-distance measurement circuits (149, 150) and also to a selector (152). The identification-distance measurement circuits (149, 150) determine the identification distance, and cause the selector (152) to select the components with a greater distance and to supply them to a majority decision circuit (153). The majority decision circuit (153) makes a majority decision of the data selected by the selector.

    摘要翻译: 从接收正交调制信息序列的接收装置移除乘法电路。 将转换成频率范围的传输参数的实数部分和虚数部分输入到各个硬判定电路(143,144)。 硬判定电路(143,144)根据预定的阈值将各个分量转换成1位数据。 差分解码电路(145,146)分别对已经被转换成1位数据的实数部分和虚数部分进行差分解码,并将获得的数据输出到累积加法电路(147,148)。 累积加法电路(147,148)累积地添加差分解调的数据并将其提供给相应的识别距离测量电路(149,150)以及选择器(152)。 识别距离测量电路(149,150)确定识别距离,并使选择器(152)选择具有较大距离的组件并将其提供给多数决定电路(153)。 多数决定电路(153)对由选择器选择的数据进行多数决定。

    Packet mode digital data receiver
    44.
    发明公开
    Packet mode digital data receiver 失效
    DigitalerPaketbetriebdatenempfänger。

    公开(公告)号:EP0597632A1

    公开(公告)日:1994-05-18

    申请号:EP93308837.9

    申请日:1993-11-04

    申请人: AT&T Corp.

    IPC分类号: H04B10/14 H04L25/06

    摘要: A dc-coupled packet mode digital data receiver for use with an optical bus, uses a peak detector(s) A 2P , A 2N to adaptively establish an instantaneous logic threshold at the beginning of a data burst. A reset circuit (620) resets the peak detector(s) and other circuits of the receiver in response to an end-of-packet reset signal, thereby enabling the reception of closely-spaced burst date packets which have greatly differing power levels.

    摘要翻译: 与光总线一起使用的直流耦合分组模式数字数据接收机,使用峰值检测器A2P,A2N在数据突发的开始时自适应地建立瞬时逻辑门限。 复位电路(620)响应于分组结束复位信号复位接收机的峰值检测器和其他电路,从而使得能够接收具有极大不同功率电平的紧密间隔的脉冲串日期分组。

    Error detection system for two-state fiber optic sensors
    46.
    发明公开
    Error detection system for two-state fiber optic sensors 失效
    Fehlererkennungssystemfürfiberoptische Sensoren mit zweiZuständen。

    公开(公告)号:EP0295489A1

    公开(公告)日:1988-12-21

    申请号:EP88108674.8

    申请日:1988-05-31

    IPC分类号: G01D18/00

    摘要: An error detection system is provided for a two-state fiber optic sensor (10) . An amplified photodetector signal is sampled by each of an ON-OFF threshold de­tector (24) , a disconnect threshold detector (26) and a slope detector (28). The ON-OFF threshold detector (24) monitors whether the detector signal is above or below an ON-OFF threshold value corresponding to the parameter being sensed and activates an appropriate sensor output. The disconnect threshold detector (26) monitors the constant low level detector signal corres­ponding to low level light received by the detector even when the threshold detector (24) is in the OFF state, and triggers an error signal should the detector signal fall below a disconnect threshold value. The slope detector (28) monitors the rate of change of the detector signal. Where the detector signal changes ra­pidly, such as during normal sensor switching, the slope detector (28) permits the detector signal to pass to a latch (30), which retains in memory the last detector signal which changed rapidly enough to trigger the slope detector (28) and produces an output corresponding to the ON-OFF status of the last detector signal in memory. A slowly changing detector signal will not trigger the slope detector (28). Where the ouputs of the ON-OFF threshold detector (24) and the latch (30) differ, a comparator (34) triggers an error signal.

    摘要翻译: 为双状态光纤传感器(10)提供错误检测系统。 通过ON-OFF阈值检测器(24),断开阈值检测器(26)和斜率检测器(28)中的每一个对放大的光检测器信号进行采样。 ON-OFF阈值检测器(24)监视检测器信号是否高于或低于与被检测的参数相对应的ON-OFF阈值,并激活适当的传感器输出。 断开阈值检测器(26)即使在阈值检测器(24)处于OFF状态时也监视与检测器接收到的低电平光相对应的恒定低电平检测器信号,并且如果检测器信号低于断开 阈值。 斜率检测器(28)监视检测器信号的变化率。 在检测器信号快速变化的情况下,例如在正常传感器切换期间,斜率检测器(28)允许检测器信号传递到锁存器(30),锁存器保持存储器中最后检测器信号,其快速变化以触发斜率检测器 (28),并产生对应于存储器中最后检测器信号的ON-OFF状态的输出。 缓慢变化的检测器信号将不会触发斜率检测器(28)。 在ON-OFF阈值检测器(24)和锁存器(30)的输出不同的地方,比较器(34)触发错误信号。

    Decision-directed control circuit and method of adjusting decision-directed apparatus
    47.
    发明公开
    Decision-directed control circuit and method of adjusting decision-directed apparatus 失效
    导向决策控制电路和方法,用于控制决定被引导装置。

    公开(公告)号:EP0281308A2

    公开(公告)日:1988-09-07

    申请号:EP88301558.8

    申请日:1988-02-24

    申请人: AT&T Corp.

    摘要: An improved decision-directed control circuit is disclosed which supplies adjustments to adaptive circuitry in a communications system. The improvement is achieved by only supplying adjustments when there is a high probability that the adjustment is correct. In the disclosed embodiments, this high probability equates, at a minimum, to times when the adaptive circuit output has an amplitude which lies outside of a range extending from the largest to the smallest value of the digital signal. This adjustment approach can be used to adjust a variety of adaptive circuits including transversal equalizers, timing recovery circuits, cross-polarization cancellers and carrier recovery circuits.

    摘要翻译: 一种改进的直接判决控制电路是游离缺失盘哪个调整提供给在通信系统中的自适应电路。该改进是通过只调整供给时实现有很高的概率没有调节是正确的。 在盘游离缺失实施例中,这种高概率等同,在最低限度,以倍当自适应电路输出具有振幅的位于的范围从大最大延伸至所述数字信号的最小值的外部。 这种调整的方法可以用于调整各种自适应电路,包括横向均衡器,定时恢复电路,交叉极化抵消器和载波恢复电路。

    DEMODULATOR OF A WIRELESS COMMUNICATION READER

    公开(公告)号:EP3226433A2

    公开(公告)日:2017-10-04

    申请号:EP17158554.0

    申请日:2017-02-28

    摘要: A demodulator including a peak sampler to control an ADC or a digital resampler to sample a carrier signal in an unmodulated state at peaks, and to sample the carrier signal in a modulated state at a phase of the unmodulated state; and an envelope builder to determine an envelope signal based on differentials between maximum and minimum peaks of respective cycles of the sampled carrier signal. Further, a demodulator having an offset estimator to estimate in-phase and quadrature components of a carrier signal in an unmodulated state to determine in-phase and quadrature component offsets; a load modulated signal estimator to estimate in-phase and quadrature components of a load modulated signal by removing the in-phase and quadrature component offsets from in-phase and quadrature component samples of the carrier signal; and an envelope builder to build an envelope signal by combining the in-phase and quadrature components of the load modulated signal.

    METHOD AND APPARATUS FOR DIRECT CONVERSION RECEIVER CORRECTING DIRECT CURRENT OFFSET
    50.
    发明公开
    METHOD AND APPARATUS FOR DIRECT CONVERSION RECEIVER CORRECTING DIRECT CURRENT OFFSET 审中-公开
    VERFAHREN UND VORRICHTUNGFÜRDIREKTUMWANDUNGSEMPFÄNGERZUR KORREKTUR VON GLEICHSTROM-OFFSET

    公开(公告)号:EP3091702A4

    公开(公告)日:2017-09-06

    申请号:EP15733140

    申请日:2015-01-02

    IPC分类号: H04B1/30 H04L25/06

    摘要: The present invention relates to a method and an apparatus for direct current offset calibration of a direct conversion receiver, a Direct Current (DC) offset calibration apparatus of a direct conversion receiver includes a plurality of variable gain amplifiers for amplifying an input signal based on a gain control value, a DC offset monitoring unit for monitoring a DC offset for an output signal of the plurality of variable gain amplifiers, a plurality of variable Digital to Analog Converters (DACs) for controlling a current applied to each of the plurality of variable gain amplifiers according to a current control code, and a DC offset cancellation unit for determining a current control code set which minimizes the DC offset value per preset gain control value, and thus the DC offset can be precisely cancelled without being affected by external factors such as a signal modulation method and heat and performance degradation of the receiver can be prevented.

    摘要翻译: 本发明涉及一种用于直接转换接收器的直流偏移校准的方法和设备,直接转换接收器的直流(DC)偏移校准设备包括多个可变增益放大器,用于放大基于 增益控制值; DC偏移监视单元,用于监视多个可变增益放大器的输出信号的DC偏移;多个可变数模转换器(DAC),用于控制施加到多个可变增益中的每一个的电流 以及DC偏移消除单元,用于确定使每个预设增益控制值的DC偏移值最小化的电流控制码组,从而可以精确地取消DC偏移而不受外部因素的影响,例如 可以防止接收器的信号调制方法和热量和性能下降。