摘要:
A multiplication circuit is removed from a receiving apparatus which receives an orthogonally modulated information sequence. A real-number part and an imaginary-number part of a transmission parameter converted into a frequency range are input to respective hard determination circuits (143, 144). The hard determination circuits (143, 144) convert the respective components into 1-bit data in accordance with a predetermined threshold value. Differential decoding circuits (145, 146) differentially decode the real-number part and the imaginary-number part which have been converted into 1-bit data, respectively, and output the obtained data to cumulative addition circuits (147, 148). The cumulative addition circuits (147, 148) cumulatively add the differentially demodulated data and supply it to respective identification-distance measurement circuits (149, 150) and also to a selector (152). The identification-distance measurement circuits (149, 150) determine the identification distance, and cause the selector (152) to select the components with a greater distance and to supply them to a majority decision circuit (153). The majority decision circuit (153) makes a majority decision of the data selected by the selector.
摘要:
A dc-coupled packet mode digital data receiver for use with an optical bus, uses a peak detector(s) A 2P , A 2N to adaptively establish an instantaneous logic threshold at the beginning of a data burst. A reset circuit (620) resets the peak detector(s) and other circuits of the receiver in response to an end-of-packet reset signal, thereby enabling the reception of closely-spaced burst date packets which have greatly differing power levels.
摘要:
An error detection system is provided for a two-state fiber optic sensor (10) . An amplified photodetector signal is sampled by each of an ON-OFF threshold detector (24) , a disconnect threshold detector (26) and a slope detector (28). The ON-OFF threshold detector (24) monitors whether the detector signal is above or below an ON-OFF threshold value corresponding to the parameter being sensed and activates an appropriate sensor output. The disconnect threshold detector (26) monitors the constant low level detector signal corresponding to low level light received by the detector even when the threshold detector (24) is in the OFF state, and triggers an error signal should the detector signal fall below a disconnect threshold value. The slope detector (28) monitors the rate of change of the detector signal. Where the detector signal changes rapidly, such as during normal sensor switching, the slope detector (28) permits the detector signal to pass to a latch (30), which retains in memory the last detector signal which changed rapidly enough to trigger the slope detector (28) and produces an output corresponding to the ON-OFF status of the last detector signal in memory. A slowly changing detector signal will not trigger the slope detector (28). Where the ouputs of the ON-OFF threshold detector (24) and the latch (30) differ, a comparator (34) triggers an error signal.
摘要:
An improved decision-directed control circuit is disclosed which supplies adjustments to adaptive circuitry in a communications system. The improvement is achieved by only supplying adjustments when there is a high probability that the adjustment is correct. In the disclosed embodiments, this high probability equates, at a minimum, to times when the adaptive circuit output has an amplitude which lies outside of a range extending from the largest to the smallest value of the digital signal. This adjustment approach can be used to adjust a variety of adaptive circuits including transversal equalizers, timing recovery circuits, cross-polarization cancellers and carrier recovery circuits.
摘要:
A demodulator including a peak sampler to control an ADC or a digital resampler to sample a carrier signal in an unmodulated state at peaks, and to sample the carrier signal in a modulated state at a phase of the unmodulated state; and an envelope builder to determine an envelope signal based on differentials between maximum and minimum peaks of respective cycles of the sampled carrier signal. Further, a demodulator having an offset estimator to estimate in-phase and quadrature components of a carrier signal in an unmodulated state to determine in-phase and quadrature component offsets; a load modulated signal estimator to estimate in-phase and quadrature components of a load modulated signal by removing the in-phase and quadrature component offsets from in-phase and quadrature component samples of the carrier signal; and an envelope builder to build an envelope signal by combining the in-phase and quadrature components of the load modulated signal.
摘要:
The present invention relates to a method and an apparatus for direct current offset calibration of a direct conversion receiver, a Direct Current (DC) offset calibration apparatus of a direct conversion receiver includes a plurality of variable gain amplifiers for amplifying an input signal based on a gain control value, a DC offset monitoring unit for monitoring a DC offset for an output signal of the plurality of variable gain amplifiers, a plurality of variable Digital to Analog Converters (DACs) for controlling a current applied to each of the plurality of variable gain amplifiers according to a current control code, and a DC offset cancellation unit for determining a current control code set which minimizes the DC offset value per preset gain control value, and thus the DC offset can be precisely cancelled without being affected by external factors such as a signal modulation method and heat and performance degradation of the receiver can be prevented.