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26 条记录 (耗时 0.011 秒)

    METHOD AND APPARATUS FOR SIGNAL INTEGRITY VERIFICATION
    2.
    发明公开
    METHOD AND APPARATUS FOR SIGNAL INTEGRITY VERIFICATION 有权
    方法和设备的信号完整性验证

    公开(公告)号：EP1323244A4

    公开(公告)日：2009-04-01

    申请号：EP01968083

    申请日：2001-08-22

    申请人： IBM

    发明人： HUTCHISON HAROLD B JR ,  CONKLIN TROY R

    IPC分类号： H04L25/02 ,  H04B3/46 ,  H04L1/20 ,  H03D3/18 ,  H03K3/00 ,  H03K5/01 ,  H03K5/22 ,  H03K9/08 ,  H04L7/00 ,  H04L27/14

    CPC分类号： H04L1/20 ,  H04L1/205

    摘要： The present invention provides a signal integrity measurement and apparatus which allows for signal characteristics to be measured by obtaining samples taken at the midpoint (3) of the data stream. The invention provides a measurement device (57; 83) that is suitable for use in the field to provide a measurement of signal characteristics within transmitted data streams. The invention is particularly suitable for field measurement of signal characteristics of data streams or continuous in-line monitoring of signal characteristics within transmitted data streams. The signal characteristics include, but are not limited to eye opening (21), jitter (23), noise (24), slope efficiency, average power and peak-to-peak amplitude.

    VARIABLE-LENGTH CORRELATOR FOR SPREAD-SPECTRUM COMMUNICATIONS
    3.
    发明公开
    VARIABLE-LENGTH CORRELATOR FOR SPREAD-SPECTRUM COMMUNICATIONS 审中-公开
    CORRELATOR可变长度扩频

    公开(公告)号：EP1543631A1

    公开(公告)日：2005-06-22

    申请号：EP03759304.3

    申请日：2003-09-18

    申请人： Thomson Licensing S.A.

    发明人： LITWIN, JR., Louis, Robert

    IPC分类号： H04B1/69 ,  H04L25/49 ,  H04L27/06 ,  H04L7/00 ,  H03D3/18 ,  H03D3/24

    CPC分类号： H04B1/7075 ,  H04B1/7087 ,  H04B1/709 ,  H04L2027/003 ,  H04L2027/0081

    摘要： An apparatus (400) and method (500) for providing variable-length correlation for spread-spectrum communications includes a derotator (412), a variable-length correlator (414) in signal communicationwith the derotator, a phase detector (416) in signal communication with the variable-length correlator, a lock detector (418) in signal communication with the phase detector, and a controller (420) in signal communication with the lock detector for controlling the length of the variable-length correlator; where the corresponding method to track out large frequency offsets in spread-spectrum communications includes receiving signal chips, correlating the received signal chips, computing a loop error in accordance with the correlation, setting a new lock status in accordance with the computed loop error and a previous lock status, and setting a new correlator length in accordance with the new lock status and a previous correlator length.

    RECEIVER INCLUDING AN OSCILLATION CIRCUIT FOR GENERATING AN IMAGE REJECTION CALIBRATION TONE
    8.
    发明公开
    RECEIVER INCLUDING AN OSCILLATION CIRCUIT FOR GENERATING AN IMAGE REJECTION CALIBRATION TONE 有权
    具有用于产生图像排斥甲振荡电路RECEIVER KALIBRATIONSTONS

    公开(公告)号：EP1671417A1

    公开(公告)日：2006-06-21

    申请号：EP04785214.0

    申请日：2004-09-29

    申请人： Silicon Laboratories, Inc.

    发明人： WILLINGHAM, Scott, D.

    IPC分类号： H03D3/18 ,  H04B1/30

    CPC分类号： H04B1/30 ,  H04B17/21

    摘要： A receiver circuit includes an oscillator circuit (100) configured to generate a calibration tone (75) and a phase locked loop (PLL) reference signal (72). An output frequency of the VCO (172) may be divided by respective amounts to derive a desired calibration tone frequency and a desired PLL reference signal frequency. In addition to the oscillator circuit, the receiver circuit may further include a phase locked circuit (60) configured to generate a PLL output signal (61) that is phase locked in relation to the PLL reference signal (72). During a calibration mode, a quadrature generator (26) may be used to generate quadrature mixer local oscillator signals dependent upon the PLL output signal (61), and an in-phase/quadrature mixer (25) may be used to mix the calibration tone (65) with the quadrature mixer LO signals.

    LOCK-IN AID FREQUENCY DETECTOR
    9.
    发明公开
    LOCK-IN AID FREQUENCY DETECTOR 有权
    频率检测器FOR LOCKING

    公开(公告)号：EP1116323A1

    公开(公告)日：2001-07-18

    申请号：EP99946679.0

    申请日：1999-08-25

    申请人： MAXIM INTEGRATED PRODUCTS ,  Hisys GmbH

    发明人： FILIP, Jan

    IPC分类号： H03D3/24 ,  H03D3/18 ,  H03D3/00 ,  H03D3/02 ,  H03D1/00

    CPC分类号： H03L7/087 ,  H03D13/003 ,  H03L7/095 ,  H03L7/10

    摘要： Circuit and method for generating a signal for use in locking a second signal on a first signal. The first and second signals have an associated frequency. A first beat note signal (PD1) and a second beat note signal (PD2) are generated from the first and second signals, respectively, when the frequencies of the first and second signals are not equal. The circuit includes a first and second flip-flop and detector circuitry. The first flip-flop (502) is configured to receive the first and second beat note signals for generating a first state signal (S0). The first flip-flop (502) generates the first state signal (S0) by sampling the second beat note signal (PD1) at a first periodic interval of the first beat note signal. The second flip-flop (504) is configured to receive the first and second beat note signals for generating a second state signal (S1). The second flip-flop (504) generates the second state signal (S1) by sampling the second beat note signal at a second periodic interval of the first beat note signal (PD1). The detector circuitry (506, 508) is coupled to receive the first and second state signals from the first and second flip-flops for detecting a polarity of the frequency difference between the first and second signals. The polarity of the frequency difference is defined in a tri-state having a positive state, a negative state, and a zero state.

    Quadrature detecting apparatus
    10.
    发明公开
    Quadrature detecting apparatus 失效
    DetektorfürQuadraturfrequenz-Modulationssignal。

    公开(公告)号：EP0488558A1

    公开(公告)日：1992-06-03

    申请号：EP91310582.1

    申请日：1991-11-15

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Ikeda, Masaharu

    IPC分类号： H03D3/18

    CPC分类号： H03D3/18

    摘要： A quadrature detecting apparatus is provided which is intended to prevent a demodulated output from being influenced by fluctuations in amplitudes of signals generated from angle-modulated signal sources such as a phase-modulated signal and a frequency-modulated signal, even if the amplitude of a driving voltage applied to a connection between the bases of a pair of transistors constituting a phase detecting device is made larger in order to enhance the demodulation sensitivity and reduce noises produced during demodulation. As an example of a resolution, the quadrature detecting apparatus comprises two coupling devices (D, E), two current dividing devices (F, G) coupled to generate a phase detecting output, a current dividing device (H, I) coupled to generate a re-mixed output, and a phase detecting device, wherein the outputs of the two coupling devices are connected to the two current driving devices driven by the same signal, so that the respective input and output terminals are at the same voltage level, whereby two outputs thereof are not influenced by fluctuations in amplitudes of angle-modulated signals supplied to the coupling devices.

    摘要翻译： 提供一种正交检测装置，其旨在防止解调输出受角度调制信号源（例如相位调制信号和调频信号）产生的信号幅度的波动的影响，即使是 构成相位检测装置的一对晶体管的基极之间的连接施加的驱动电压变大，以提高解调灵敏度并减少解调时产生的噪声。 作为分辨率的例子，正交检测装置包括两个耦合装置（D，E），耦合以产生相位检测输出的两个电流分配装置（F，G），耦合以产生相位检测输出的电流分配装置（H，I） 再混合输出和相位检测装置，其中两个耦合装置的输出连接到由相同信号驱动的两个电流驱动装置，使得相应的输入和输出端子处于相同的电压电平，由此 其两个输出不受供给到耦合装置的角度调制信号的振幅的波动的影响。