公开(公告)号：EP2382706A4

公开(公告)日：2012-07-04

申请号：EP09835937

申请日：2009-12-29

申请人： AUDERA INTERNAT SALES INC

发明人： FRENCH JOHN B ,  MASON ANDREW

IPC分类号： H03F1/02 ,  H03F3/187 ,  H03F3/30 ,  H03F3/68

CPC分类号： H03F3/3076 ,  H03F1/0227 ,  H03F3/187 ,  H03F3/68 ,  H03F2200/03 ,  H03F2200/102 ,  H03F2200/33 ,  H03F2200/411 ,  H03F2200/441 ,  H03F2200/504 ,  H03F2200/78

公开(公告)号：EP2202880A4

公开(公告)日：2012-02-29

申请号：EP08841759

申请日：2008-10-08

申请人： TOA CORP

发明人： KAWAGUCHI KOJI

IPC分类号： H03F3/68 ,  H03F1/02 ,  H03F1/52 ,  H03F3/187 ,  H03F3/20 ,  H03F3/21 ,  H03F3/72 ,  H04R3/12 ,  H05K5/00

CPC分类号： H03F3/68 ,  H03F1/0277 ,  H03F1/52 ,  H03F3/187 ,  H03F3/211 ,  H03F3/72 ,  H03F2200/03 ,  H03F2200/414 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/21109 ,  H03F2203/21145 ,  H04R3/007 ,  H04R3/12

公开(公告)号：EP2301151A1

公开(公告)日：2011-03-30

申请号：EP09762773.1

申请日：2009-06-11

申请人： National University of Singapore

发明人： LIAN, Yong ,  YAO, Libin ,  XU, Xiaoyuan ,  ZOU, Xiaodan

IPC分类号： H03H11/02 ,  H03F3/187

CPC分类号： H03F3/187 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/261 ,  H03F2200/411 ,  H03F2203/45138 ,  H03F2203/45524 ,  H03F2203/45526 ,  H03F2203/45544 ,  H03F2203/45548 ,  H03F2203/45562 ,  H03F2203/45604 ,  H03H11/1291 ,  Y10T29/49002

摘要： A CMOS amplifier with integrated tunable band-pass function, a tunable active resistor structure, a method of amplifying an input signal and a method of fabricating an amplifier. The tunable active resistor structure comprises two symmetrically cross-coupled transistors.

公开(公告)号：EP2162984A2

公开(公告)日：2010-03-17

申请号：EP08789150.3

申请日：2008-06-19

申请人： NXP B.V.

发明人： BERKHOUT, Marco ,  KRABBENBORG, Benno

IPC分类号： H03F3/217 ,  H03F1/32 ,  H03K7/08 ,  G06G7/184 ,  H03F3/187

CPC分类号： H03F3/2171 ,  H03F1/3205 ,  H03F3/187 ,  H03F2200/03 ,  H03F2200/264 ,  H03F2200/351 ,  H03K7/08

摘要： Apulse width modulation (PWM) circuit comprises a first integrator (g m1) witha first feedback capacitor (C1), a second integrator (gm1) with a second feedback capacitor (C2) and a comparator (A0) having a first input (V1) connected to the output of the first integrator (gm1) and a second input (V2) connected to the output of the second integrator (gm2). A connection path comprising a resistor (R2) is established from the output of the first integrator (gm1) to an input of the second integrator (gm2). The first and second feedback capacitors (C1, C2) have capacities witha non-linear factor X(V) and a circuit with an inversely non-linear factor X-1(V) is arranged in the connection path between the output of the first integrator (gm1) and said input of the second integrator (gm2). The PWM circuit may formpath of a Class-D amplifier.

公开(公告)号：EP0449104B1

公开(公告)日：1996-06-05

申请号：EP91104397.4

申请日：1991-03-21

申请人： THOMSON CONSUMER ELECTRONICS, INC.

发明人： Rumreich, Mark Francis

IPC分类号： H03F3/187

CPC分类号： H03F3/187

公开(公告)号：EP0062700B1

公开(公告)日：1984-02-22

申请号：EP81109135.4

申请日：1981-10-28

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Mündel, Gerald, Dipl.-Ing. ,  Lenz, Michael, Ing. grad.

IPC分类号： H03F1/30 ,  H03F3/187

CPC分类号： H03F1/305

公开(公告)号：EP0011705B1

公开(公告)日：1982-04-28

申请号：EP79104040.5

申请日：1979-10-18

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Krämer, Horst, Dipl.-Ing.

IPC分类号： H03F3/187 ,  H03F3/45 ,  H04M1/60

CPC分类号： H03F3/187 ,  H03F3/45094 ,  H04M1/6008

公开(公告)号：EP3641338B1

公开(公告)日：2024-02-21

申请号：EP18820785.6

申请日：2018-04-18

发明人： YIN, Deyang ,  LI, Jun ,  LI, Ding ,  DU, Shuai

IPC分类号： H04R3/02 ,  H03F3/72 ,  H03F3/45 ,  H03F1/30 ,  H03F3/185 ,  H03F3/187

公开(公告)号：EP3616317B1

公开(公告)日：2023-12-20

申请号：EP18724489.2

申请日：2018-04-27

发明人： WESTPHAL, Ernst-Heinrich

IPC分类号： H03F3/187 ,  H03F3/45 ,  H03F3/21 ,  H03F1/30 ,  H03F3/30 ,  H03F3/183

公开(公告)号：EP4142158A1

公开(公告)日：2023-03-01

申请号：EP22192003.6

申请日：2022-08-24

申请人： Analog Devices International Unlimited Company

发明人： PUCHALT, Gerard ,  MEDINA SÁNCHEZ CASTRO, Italo Carlos ,  BONACHE MARTINEZ, Jesús

IPC分类号： H03M1/06 ,  H03M1/78 ,  H03F1/02 ,  H03F3/187 ,  H03F3/347 ,  H03F3/45

摘要： Techniques for interpolating two voltages without loading them and without requiring significant power or additional area are described. The techniques include specific topologies for the buffering amplifiers that offer accuracy by cancelling systematic error sources without relying on high gain, thus simplifying the frequency compensation, and reducing power consumption. This can be achieved by biasing the amplifiers from the load current by an innovative feedback structure, which can remove the need for high impedance nodes inside the amplifiers.