公开(公告)号：EP3411950A1

公开(公告)日：2018-12-12

申请号：EP16702935.4

申请日：2016-02-04

申请人： Fraunhofer Gesellschaft zur Förderung der angewandten Forschung E.V.

发明人： VAN RAAY, Friedbert

IPC分类号： H03F3/24 ,  H03F1/02 ,  H03F1/56 ,  H03F3/195 ,  H03F3/42 ,  H03F3/45 ,  H03F3/60 ,  H03F1/52

CPC分类号： H03F3/211 ,  H01Q23/00 ,  H03F1/523 ,  H03F1/56 ,  H03F1/565 ,  H03F3/195 ,  H03F3/245 ,  H03F3/423 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/604 ,  H03F3/607 ,  H03F2200/06 ,  H03F2200/108 ,  H03F2200/135 ,  H03F2200/181 ,  H03F2200/222 ,  H03F2200/255 ,  H03F2200/297 ,  H03F2200/301 ,  H03F2200/315 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/42 ,  H03F2200/423 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/498 ,  H03F2200/75 ,  H03F2203/45138 ,  H03F2203/45148 ,  H03F2203/45151 ,  H03F2203/45156 ,  H03F2203/45166 ,  H03F2203/45202 ,  H03F2203/45208 ,  H03F2203/45224 ,  H03F2203/45258 ,  H03F2203/45338 ,  H03F2203/45458 ,  H03F2203/45488 ,  H03F2203/45496 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03F2203/45631 ,  H03F2203/45696 ,  H03F2203/45702

摘要： A power amplifier includes a two-dimensional matrix of N×M active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately N×M the output power of each of the active cells.

公开(公告)号：EP3335318A1

公开(公告)日：2018-06-20

申请号：EP16753784.4

申请日：2016-08-09

申请人： Cirrus Logic International Semiconductor Ltd.

发明人： ZANBAGHI, Ramin ,  MORTAZAVI, Yousof ,  BRENNAN, Aaron ,  MELANSON, John, L.

IPC分类号： H03M1/12 ,  H03M3/00 ,  H04R19/04

CPC分类号： H03M1/14 ,  G06F3/16 ,  G11C27/024 ,  H03F3/005 ,  H03F3/45475 ,  H03F3/45959 ,  H03F2203/45421 ,  H03F2203/45512 ,  H03F2203/45544 ,  H03F2203/45551 ,  H03M1/124 ,  H03M1/1295 ,  H03M3/458 ,  H03M3/494 ,  H03M3/496 ,  H04R3/00 ,  H04R19/04 ,  H04R29/004 ,  H04R2499/11

摘要： One method of processing microphone input in an ADC to determine microphone configuration is to process the microphone input signals in two processing paths, in which one processing path processes a difference between differential input signals and another processing path processes an average value of the differential input signals. The outputs of these processing paths may be combined to generate a digital signal representative of the analog signal from the microphone. The digital signal contains a digital version of the audio in the environment around the microphone, but may also be used to detect microphone topology and configure aspects of the processing paths to match the detected microphone topology. An apparatus for an ADC may implement the two processing paths as two delta-sigma modulator loops.

公开(公告)号：EP3062439A1

公开(公告)日：2016-08-31

申请号：EP16152323.8

申请日：2016-01-21

申请人： Intel IP Corporation

发明人： ISSAKOV, Vadim ,  HIRSCH, Konrad ,  STOCKINGER, Herbert ,  DOPPKE, Harald

IPC分类号： H03F1/02 ,  H03F3/193 ,  H03F3/30 ,  H03F3/195 ,  H03F1/08 ,  H03F3/21 ,  H03F3/45

CPC分类号： H03F3/265 ,  H03F1/0216 ,  H03F1/0233 ,  H03F1/0272 ,  H03F1/0283 ,  H03F1/08 ,  H03F3/193 ,  H03F3/195 ,  H03F3/211 ,  H03F3/3001 ,  H03F3/45179 ,  H03F2200/111 ,  H03F2200/121 ,  H03F2200/216 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/72 ,  H03F2203/30027 ,  H03F2203/30063 ,  H03F2203/30081 ,  H03F2203/45018 ,  H03F2203/45032 ,  H03F2203/45091 ,  H03F2203/45156 ,  H03F2203/45236 ,  H03F2203/45268 ,  H03F2203/45278 ,  H03F2203/45306 ,  H03F2203/45318 ,  H03F2203/45511 ,  H03F2203/45544 ,  H03F2203/45554 ,  H03F2203/45562

摘要： An amplifier (107, 109) operates to provide a high output impedance at an output (208) through a push stage having a first transistor (M1) of a first transistor type and a pull stage having a second transistor (M2) of a second transistor type that is different from the first transistor type. The first transistor (M1) and the second transistor (M2) are coupled in a common-gate configuration. The first transistor and the second transistor are shorted together via a capacitor (C1) coupled to an input and share a common current path as a push-pull current-reusing common-gate low noise amplifier with a broadband input matching.

摘要翻译： 放大器（107,109）操作以通过具有第一晶体管类型的第一晶体管（M1）和具有第二晶体管（M2）的第二晶体管（M2）的推进级的输出端（208）提供高输出阻抗， 晶体管类型与第一晶体管类型不同。 第一晶体管（M1）和第二晶体管（M2）以共栅配置耦合。 第一晶体管和第二晶体管通过耦合到输入的电容器（C1）而短路在一起，并且共用公共电流路径作为具有宽带输入匹配的推挽电流再利用共栅低噪声放大器。

公开(公告)号：EP2592652A3

公开(公告)日：2015-09-30

申请号：EP12007611.2

申请日：2012-11-08

申请人： IMEC

发明人： Van Helleputte, Nick

IPC分类号： H01L27/08 ,  H03F1/56 ,  H03F3/45 ,  A61B5/00 ,  A61B5/04 ,  A61B5/053

CPC分类号： A61B5/7214 ,  A61B5/04017 ,  A61B5/0402 ,  A61B5/0531 ,  H01L27/0811 ,  H03F1/56 ,  H03F3/45475 ,  H03F2200/213 ,  H03F2200/261 ,  H03F2203/45538 ,  H03F2203/45544 ,  H03F2203/45548 ,  H03F2203/45576

摘要： The invention relates to a variable capacitor circuit (100) comprising a plurality of MOS capacitors (110), each MOS capacitor being implemented by a MOS transistor with the gate terminal connected to a first voltage signal (Vs) and with the drain terminal shorted with the source terminal and connected to a second voltage signal (Vc), said MOS capacitors being connected in parallel through the gate terminal connected to the first voltage signal (Vs), and being operated in a cut-off region (120) in which the equivalent capacitance (C) of each MOS capacitor remains substantially constant for variations of the first voltage signal. The invention also relates to a method for compensating a capacitance mismatch in a biomedical signal acquisition system using the described variable capacitor circuit (100).

公开(公告)号：EP2833379A1

公开(公告)日：2015-02-04

申请号：EP14178868.7

申请日：2014-07-29

申请人： Schneider Electric Industries SAS

发明人： Guenego, Michel

IPC分类号： H01F27/42 ,  H03F3/45 ,  H03H11/12 ,  H04B3/14 ,  G01R15/18

CPC分类号： H03H7/0161 ,  G01R15/183 ,  H01F27/427 ,  H03F3/45475 ,  H03F2203/45512 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03H7/0107 ,  H03H11/126 ,  H03H2250/00 ,  H04B3/14

摘要： Dispositif de correction de la bande passante d'un transformateur à entrefer (modelisé par 100+101+102+104), présentant une fréquence de coupure, caractérisé en ce qu'il comporte un filtre (201-207) destiné à être relié en série avec le transformateur, et en ce que le filtre est adapté pour amplifier le signal qu'il reçoit du transformateur pour des fréquences inférieures à la fréquence de coupure du transformateur, de sorte que la bande passante du transformateur équipé du dispositif de correction est augmentée et présente une fréquence de coupure inférieure à celle du transformateur.

公开(公告)号：EP2566048A2

公开(公告)日：2013-03-06

申请号：EP12182338.9

申请日：2012-08-30

申请人： NF Corporation

发明人： Sobukawa, Shingo

IPC分类号： H03F3/45 ,  H03F1/34 ,  H03F1/48

CPC分类号： H03F1/34 ,  H03F1/486 ,  H03F3/087 ,  H03F3/211 ,  H03F3/45475 ,  H03F2200/135 ,  H03F2200/144 ,  H03F2200/261 ,  H03F2200/36 ,  H03F2200/405 ,  H03F2200/408 ,  H03F2200/411 ,  H03F2203/45138 ,  H03F2203/45512 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45536 ,  H03F2203/45544 ,  H03F2203/45548 ,  H03F2203/45594 ,  H03F2203/45612

摘要： An amplifier circuit whose frequency response has almost no soft knee characteristic or no peak when inverting input capacitance Csin varies and when feedback capacitance Cf is a fixed value of small capacitance is provided. The amplifier circuit includes a plurality of amplifiers (U1, U2) each of which negative feedback is provided to and which are connected in series, and a feedback circuit (4, 8, 12) which is connected to an output side of an amplifier near output (U2) of the amplifier circuit and an input side of an amplifier near input (U1) of the amplifier circuit. These amplifiers are ones in the plurality of amplifiers. One or odd numbers of amplifiers in the plurality of amplifiers are inverting amplifiers.

摘要翻译： 当反相输入电容Csin变化时，频率响应几乎没有软拐点特性或无峰值的放大器电路，并且当反馈电容Cf是小电容的固定值时提供。 放大器电路包括多个放大器（U1，U2），每个放大器负载反馈被提供给串联连接，反馈电路（4,8,12）连接到放大器的输出侧 输出（U2）和放大器电路的输入端（U1）附近的放大器的输入侧。 这些放大器是多个放大器中的放大器。 多个放大器中的一个或多个放大器是反相放大器。

公开(公告)号：EP2301151A1

公开(公告)日：2011-03-30

申请号：EP09762773.1

申请日：2009-06-11

申请人： National University of Singapore

发明人： LIAN, Yong ,  YAO, Libin ,  XU, Xiaoyuan ,  ZOU, Xiaodan

IPC分类号： H03H11/02 ,  H03F3/187

CPC分类号： H03F3/187 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/261 ,  H03F2200/411 ,  H03F2203/45138 ,  H03F2203/45524 ,  H03F2203/45526 ,  H03F2203/45544 ,  H03F2203/45548 ,  H03F2203/45562 ,  H03F2203/45604 ,  H03H11/1291 ,  Y10T29/49002

摘要： A CMOS amplifier with integrated tunable band-pass function, a tunable active resistor structure, a method of amplifying an input signal and a method of fabricating an amplifier. The tunable active resistor structure comprises two symmetrically cross-coupled transistors.

公开(公告)号：EP1751853A1

公开(公告)日：2007-02-14

申请号：EP05748731.6

申请日：2005-05-12

申请人： Sirific Wireless Corporation

发明人： MANKU, Tajinder

IPC分类号： H03F1/32 ,  H03K5/01 ,  H04B1/38 ,  H04B15/06 ,  H04B1/12 ,  H03F3/18 ,  H03D1/02 ,  H03C1/06

CPC分类号： H03K5/1252 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1491 ,  H03F1/3211 ,  H03F1/3223 ,  H03F3/24 ,  H03F3/45183 ,  H03F2200/372 ,  H03F2200/87 ,  H03F2203/45318 ,  H03F2203/45366 ,  H03F2203/45498 ,  H03F2203/45544 ,  H03K5/02 ,  H04B1/0475 ,  H04B1/123 ,  H04B2001/0441

摘要： A CMOS transconductor for cancelling third-order intermodulation is provided. The transconductor includes a transconductance circuit and a tuneable distortion circuit. The transconductance circuit takes an input voltage and generates an output current having a transconductance element and an IM3 element. The distortion circuit takes the same input voltage and generates a current having an IM3 element of equal amplitude and opposite phase to the IM3 element of the transconductance circuit. A controller circuit tunes the distortion circuit to adjust its IM3 element to substantially equal the amplitude of the IM3 of the transconductance circuit. The distortion and transconductance circuits are arranged to sum their output currents thereby effectively cancelling the IM3 elements, leaving the transconductance relatively unmodified.

公开(公告)号：EP1289124A2

公开(公告)日：2003-03-05

申请号：EP02015780.6

申请日：2002-07-15

申请人： Nokia Corporation

发明人： Pettersson, Markus ,  Murtojardi, Simo

IPC分类号： H03D7/14

CPC分类号： H03F3/45089 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/1491 ,  H03D7/165 ,  H03D2200/0025 ,  H03D2200/0033 ,  H03F3/45085 ,  H03F2203/45544 ,  H03F2203/45566 ,  H03F2203/45574 ,  H03F2203/45594 ,  H03F2203/45702

摘要： A circuit arrangement that stacks a modulator and automatic gain control (AGC) amplifier so as to re-use the modulator output current to drive the AGC amplifier, thereby saving power consumption and avoiding an unnecessary signal transformation between the two stages. A balanced circuit topology is used. The modulation signal can be selected over a wide range (100 MHz to 5.4 GHz) and the circuit arrangement is therefore particularly suitable for wireless applications (e.g. GSM-EDGE) and for integrated circuit fabrication.

公开(公告)号：EP0726648A1

公开(公告)日：1996-08-14

申请号：EP96200158.2

申请日：1996-01-23

申请人： PHILIPS COMPOSANTS ET SEMICONDUCTEURS ,  PHILIPS ELECTRONICS N.V.

发明人： Chevalier, Gilles

IPC分类号： H03F3/45 ,  H03B5/12

CPC分类号： H03F3/45089 ,  H03F2203/45296 ,  H03F2203/45302 ,  H03F2203/45311 ,  H03F2203/45352 ,  H03F2203/45544 ,  H03F2203/45654 ,  H03F2203/45696 ,  H03F2203/45702 ,  H03J5/244

摘要： Circuit d'accord dans lequel un oscillateur local est constitué d'un amplificateur qui est couplé à un cicuit résonant du type à inductance et capacité variable, l'amplificateur comportant un premier étage formé d'au moins une paire différentielle de transistors bipolaires (T1, T2).
Selon l'invention, l'amplificateur comporte encore un deuxième étage avec une autre paire différentielle de transistors dont les émetteurs réunis sont alimentés par le courant collecteur de l'un (T2) des transistors du premier étage. Un transistor (T3) de la paire différentielle du deuxième étage a son collecteur qui débite sur une résistance de charge principale (RL) et sa base qui est couplée au collecteur de l'autre (T1) transistor du premier étage, lequel débite sur une résistance de charge annexe (Rb). La base de l'autre transistor (T4) de la paire différentielle du deuxième étage peut être polarisée à tension fixe (Vref2) ou encore à tension variable, de phase appropriée.
Application : à la réception de signaux de télévision couvrant une large bande de fréquences.

摘要翻译： 该电路包括由耦合到LC谐振器电路的放大器形成的本地振荡器。 第一级是NPN晶体管（T1，T2）的差分对。 第二级是另一对NPN晶体管（T3，T4），其发射极连接到第一晶体管之一的集电极。 第二对的一个晶体管（T3）在其集电极电路中具有主负载电阻（RL），而基极返回到第一对的另一晶体管（T1）的集电极，具有补充负载电阻（Rb）。