公开(公告)号：EP3955459B1

公开(公告)日：2024-10-02

申请号：EP21189127.0

申请日：2021-08-02

IPC: H03F3/193 ,  H03F1/32 ,  H03F3/30

CPC classification number: H03F2200/29420130101 ,  H03F2200/45120130101 ,  H03F2200/4220130101 ,  H03F2200/4820130101 ,  H03F2200/7520130101 ,  H03F2200/13520130101 ,  H03F3/193 ,  H03F1/3205 ,  H03F1/3217 ,  H03F3/3022 ,  H03F1/3223

公开(公告)号：EP3525341B8

公开(公告)日：2024-06-12

申请号：EP19156864.1

申请日：2019-02-13

IPC: H03F1/32 ,  H03F1/30 ,  H03F3/45 ,  H03F1/22

CPC classification number: H03F1/223 ,  H03F1/3205 ,  H03F1/3211 ,  H03F3/45188 ,  H03F3/45475 ,  H03F2200/21120130101 ,  H03F1/3276 ,  H03F1/301

公开(公告)号：EP3378156A1

公开(公告)日：2018-09-26

申请号：EP16801089.0

申请日：2016-11-08

Applicant: Raytheon Company

Inventor： BETTENCOURT, John P. ,  MALLAVARPU, Raghuveer

IPC: H03F3/195 ,  H03F3/213 ,  H03F1/32 ,  H01L29/872 ,  H01L29/08

CPC classification number: H01L27/0629 ,  H01L21/8232 ,  H01L21/823437 ,  H01L21/823475 ,  H01L21/8252 ,  H01L29/0696 ,  H01L29/0891 ,  H01L29/1095 ,  H01L29/2003 ,  H01L29/47 ,  H01L29/7787 ,  H01L29/812 ,  H01L29/872 ,  H03F1/3205 ,  H03F1/3276 ,  H03F1/56 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/126 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2200/75

Abstract: A structure having: a plurality of field effect transistors (FETs) connected between a common input and a common output, each one of the field effect transistors comprises: a source region, a drain region, and a gate electrode for controlling carriers through a channel region of a transistor region of the structure between the source region and the drain region; a plurality of diodes, each one of the diodes being associated with a corresponding one of the plurality of FETs, each one of the diodes having an electrode in Schottky contact with a diode region of the corresponding one of the FETs. The gate electrode and the diode electrode extend along parallel lines. The source region, the drain region, the channel region, and a diode region having therein the diode are disposed along a common line.

公开(公告)号：EP3346608A1

公开(公告)日：2018-07-11

申请号：EP17150707.2

申请日：2017-01-09

Applicant: NXP B.V.

Inventor： D'AVINO, Marco ,  VAN DER HEIJDEN, Mark Pieter ,  GROENEWEGEN, Michel Wilhelmus Arnoldus ,  DE VREEDE, Leonardus Cornelis Nicolaas

IPC: H03F1/32 ,  H03F3/195

CPC classification number: H03F1/32 ,  H03F1/3205 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/225 ,  H03F2200/366 ,  H03F2200/391 ,  H03F2200/402 ,  H03F2200/42 ,  H03F2200/451 ,  H03F2200/498 ,  H03F2200/75

Abstract: An RF amplifier (200) is described including an input (206), an output (210), a parallel arrangement of a first branch (202a) and at least one further branch (202b), each branch comprising a bipolar transistor (T1a',T1b') in a degenerative emitter configuration having a base coupled to the input (206), a collector coupled to a common collector node (208), and an emitter degeneration impedance (Zea', Zeb') arranged between the emitter and a common rail (212). The common collector node (208) is coupled to the output (210), the base of the first branch bipolar transistor (T1a') is biased at a first bias voltage (204a) and the base of the at least one further branch bipolar transistor (T1b') is biased (204b) at a bias voltage offset from the first bias voltage (204a). In operation of the RF amplifier (200) a IM3 distortion current output (210) by the first branch bipolar transistor (T1a') is in antiphase to a IM3 distortion current output by the at least one further branch bipolar transistor (T1b').

公开(公告)号：EP3197048A1

公开(公告)日：2017-07-26

申请号：EP16199083.3

申请日：2016-11-16

Applicant: MediaTek Inc.

Inventor： Tseng, Chien-Wei ,  Tsai, Ming-Da

IPC: H03F3/193 ,  H03F1/14 ,  H03F1/32 ,  H03F3/21 ,  H03F1/02

CPC classification number: H03F3/21 ,  H03F1/0266 ,  H03F1/14 ,  H03F1/3205 ,  H03F1/3276 ,  H03F3/193 ,  H03F2200/213 ,  H03F2200/222 ,  H03F2200/228 ,  H03F2200/435 ,  H03F2200/451 ,  H03F2200/465 ,  H03F2200/471 ,  H03F2200/546 ,  H03F2200/555 ,  H03F2200/75 ,  H03F2200/78 ,  H03F2201/3215

Abstract: A control circuit (230) of a power amplifier (210) includes a peak detector (320), a first comparator (332), a first current source (334), a second comparator (342), a second current source (344) and a bias circuit (350). The peak detector (320) is arranged for detecting an amplitude of an input signal. The first comparator (332) is arranged for comparing the amplitude of the input signal with a first threshold to generate a first comparing result. The first current source (334) is arranged for generating a first current according to the first comparing result. The second comparator (342) is arranged for comparing the amplitude of the input signal with a second threshold to generate a second comparing result. The second current source (344) is arranged for generating a second current according to the second comparing result. The bias circuit (350) is arranged for generating a bias voltage according to the first current and the second current to the power amplifier (210).

Abstract translation: 功率放大器（210）的控制电路（230）包括峰值检测器（320），第一比较器（332），第一电流源（334），第二比较器（342），第二电流源（344） 和偏置电路（350）。 峰值检测器（320）被布置用于检测输入信号的幅度。 第一比较器（332）用于将输入信号的幅度与第一阈值进行比较以产生第一比较结果。 第一电流源（334）用于根据第一比较结果产生第一电流。 第二比较器（342）用于将输入信号的幅度与第二阈值进行比较以产生第二比较结果。 第二电流源344用于根据第二比较结果产生第二电流。 偏置电路（350）被设置用于根据到功率放大器（210）的第一电流和第二电流产生偏置电压。

公开(公告)号：EP3197046A1

公开(公告)日：2017-07-26

申请号：EP17153080.1

申请日：2017-01-25

Applicant: Sonion Nederland B.V.

Inventor： van Nieuwkerk, Michiel ,  Gao, Yang

IPC: H03F1/30 ,  H03F1/32 ,  H03F3/185 ,  H03F3/187 ,  H03F3/21 ,  H03F3/50 ,  H03F3/72

CPC classification number: H04R3/005 ,  H03F1/303 ,  H03F1/3205 ,  H03F3/185 ,  H03F3/187 ,  H03F3/211 ,  H03F3/505 ,  H03F3/72 ,  H03F2200/03 ,  H03F2200/168 ,  H03F2200/171 ,  H03F2200/18 ,  H03F2200/219 ,  H03F2200/297 ,  H03F2200/411 ,  H03F2200/474 ,  H03F2200/54 ,  H03F2200/69 ,  H03F2203/21161 ,  H03F2203/5012 ,  H03F2203/5021 ,  H03F2203/5027 ,  H04R19/04

Abstract: The present invention relates to a self-biasing output booster amplifier (200) comprising an input amplifier stage (201), an output amplifier stage (206) being operatively connected to an output of the input amplifier stage, and first (203) and second (202) current copying circuits, wherein the second current copying circuit (202) is biased from an output of the self-biasing output booster amplifier (+). The first (203) and second (203) current copying circuits are configured to copy at least a portion of the current (Ios) through the output amplifier stage (206). The sum of the output of the second current copying circuit (202) and the output of the output amplifier stage (206) provides the output current (Isource - Io) of the self-biasing output booster amplifier (200), Finally, the input amplifier stage (201) is biased from the output of the second current copying circuit (202).

Abstract translation: 本发明涉及包括输入放大器级（201），可操作地连接到输入放大器级的输出的输出放大器级（206）的自偏置输出升压放大器（200），以及第一（203）和第二 （202）电流复制电路，其中所述第二电流复制电路（202）从所述自偏置输出升压放大器（+）的输出偏置。 第一（203）和第二（203）电流复制电路被配置为通过输出放大器级（206）复制电流（Ios）的至少一部分。 第二电流复制电路（202）的输出和输出放大器级（206）的输出之和提供自偏置输出升压放大器（200）的输出电流（Isource-Io）。最后，输入 放大器级（201）被从第二电流复制电路（202）的输出偏置。

公开(公告)号：EP3151423A1

公开(公告)日：2017-04-05

申请号：EP16170310.3

申请日：2016-05-19

Applicant: MediaTek Inc.

Inventor： HUANG, Mu-Chen

IPC: H03F1/32

CPC classification number: H03K17/6871 ,  H03F1/3205 ,  H03F3/505 ,  H03F2200/69 ,  H03K5/08

Abstract: An input stage of a chip (1 00) includes a source follower (110) and a sensing and clamping circuit (120). The source follower (110) is arranged for receiving an AC-coupled signal to generate an output signal at an output terminal. The sensing and clamping circuit (1 20) is coupled to the source follower (110), and is arranged for clamping the output terminal of the source follower (110) at a fixed DC voltage.

Abstract translation: 芯片（100）的输入级包括源极跟随器（110）和感测和钳位电路（120）。 源极跟随器（110）布置成用于接收AC耦合信号以在输出端产生输出信号。 感测和钳位电路（120）耦合到源极跟随器（110），并且被布置成以固定的DC电压钳位源极跟随器（110）的输出端子。

公开(公告)号：EP2543136B1

公开(公告)日：2017-03-08

申请号：EP10719533.1

申请日：2010-03-16

Applicant: Devialet

Inventor： MORONVALLE, Mathias ,  CALMEL, Pierre-Emmanuel

IPC: H03F1/08 ,  H03F1/30 ,  H03F1/32

CPC classification number: H03F1/3205 ,  H03F1/086 ,  H03F1/301 ,  H03F2200/03

公开(公告)号：EP2486652A4

公开(公告)日：2016-09-21

申请号：EP10822344

申请日：2010-10-05

Applicant: HITTITE MICROWAVE LLC

Inventor： KOCER FATIH ,  TRAUT FRANK A ,  EKEN YALCIN ALPER ,  KATZIN PETER

IPC: H03F3/04 ,  H03F1/30 ,  H03F1/32 ,  H03F3/24

CPC classification number: H03F1/3205 ,  H03F1/305 ,  H03F3/24

公开(公告)号：EP2613438B1

公开(公告)日：2016-04-06

申请号：EP11821235.6

申请日：2011-05-13

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： OZAKI, Seigo ,  KAWATA, Hirotsugu

IPC: H03F1/34 ,  H03F1/26 ,  H03F1/32 ,  H03F3/20 ,  H03F1/02 ,  H03F3/185 ,  H03F3/217

CPC classification number: H03F3/185 ,  H03F1/0211 ,  H03F1/0222 ,  H03F1/3205 ,  H03F3/1855 ,  H03F3/2173 ,  H03F2200/171 ,  H03F2200/504