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公开(公告)号：EP0461922B1
公开(公告)日：1999-08-18
申请号：EP91305416.9
申请日：1991-06-14
发明人： Koyama, Mikio, c/o Intellectual Property Division , Tanimoto, Hiroshi, c/o Intellectual Property Div.
CPC分类号： G06G7/184 , H03H11/0433 , H03H11/045
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公开(公告)号：EP0621550A3
公开(公告)日：1996-07-31
申请号：EP94302712.8
申请日：1994-04-15
发明人： Rapeli, Juha
IPC分类号： G06G7/184
CPC分类号： G06G7/184
摘要： The present invention relats to a method for processing a signal, and a signal processing circuit according to the method, in which circuit one or two transistors (T1, T2) switched according to the switches are used as the active member of the entire circuit, the charge passing through said transistors being controlled, in addition to the switches, by the transferrable charge itself so that on concluded transfer of charge, all current flow in the circuit stops by itself. By means of the present invention, the signal processing is, irrespective of the polarity of the signal (positive or negative) and of the threshold voltages (Uth1, Uth2) of the transistors, linear because the signal voltage (U S ) is produced, as taught by the invention, relative to a reference voltage (U Ref ) of predetermined magnitude in that a sum of the signal voltage (U S ) and said reference voltage (U Ref ) is produced and the polarity of said sum is every time the same as the polarity of the reference voltage (U Ref ), irrespective of the variation of the signal voltage (U S ), and when charge samples proportional to the signal voltage (U S ) are taken, a quantity thereof is taken which is proportional to the sum (U S + U Ref ) of the signal voltage (U S ) and the reference voltage (U Ref ), whereby the charge samples pro-portional to said sum (U S + U Ref ) are transferred to the integrating capacitance (C 0 ) included in the circuit, and thereafter, a quantity of charge samples proportional to the reference voltage (U Ref ) is added into the integrating capacitance (C 0 ) with an opposite polarity relative to the polarity of the charge samples proportional to said sum (U S + U Ref ).
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公开(公告)号：EP0412609B1
公开(公告)日：1996-04-17
申请号：EP90202115.3
申请日：1990-08-03
发明人： Hughes, John Barry
CPC分类号： G06G7/184 , G11C27/028
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公开(公告)号：EP0372649B1
公开(公告)日：1995-03-22
申请号：EP89203069.3
申请日：1989-12-04
发明人： Hughes, John Barry
CPC分类号： G06G7/184 , G11C27/028
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55.发明公开Dynamic voltage integration method and circuits for implementing and applying the same 失效动态电压积分方法及其实施及其应用电路
公开(公告)号：EP0473436A3
公开(公告)日：1992-06-03
申请号：EP91307923.2
申请日：1991-08-30
发明人： Rapeli, Juha
CPC分类号： G06G7/184
摘要： An integrating circuit is formed in the present invention, of which the active element is a pair of bipolar transistors (T5/T6) or a CMOS transistor (T8) which with the aid of switches (s81 to s88) controls the storing of a sample charge from the signal voltage (Us) in a sampling capacitor (Ci) and the discharging of the sample into an integrating capacitor (Co). The circuit only consumes current while charges are being transferred.
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公开(公告)号：EP0220486A3
公开(公告)日：1990-03-14
申请号：EP86113024.3
申请日：1986-09-22
发明人： Poletto, Vanni , Siligoni, Marco
摘要： The broad-band integrator uses bipolar transistors with single low-value integration capacitor, that is why it is easy to integrate. A bias circuit, which can be integrated, allows both the gain-bandwidth product (GB) and the absolute values of the currents in the transistors to be programmed by two external resistors. A plurality of integrators, typically sixteen, can be connected to the same bias circuit thanks to their small powercon- sumption.
摘要翻译： 宽带积分器采用双极晶体管和单个低价值集成电容，因此易于集成。 可以集成的偏置电路允许增益带宽乘积（G * B）和晶体管中的电流绝对值由两个外部电阻编程。 多个积分器，通常为16个，由于其小功率消耗，可以连接到相同的偏置电路。
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公开(公告)号：EP0191089A4
公开(公告)日：1988-01-28
申请号：EP85904333
申请日：1985-08-20
申请人： GEN DATACOMM IND INC
发明人： ROBINSON JEFFREY IAN
CPC分类号： H03H11/045 , G06G7/184
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公开(公告)号：EP0220486A2
公开(公告)日：1987-05-06
申请号：EP86113024.3
申请日：1986-09-22
发明人： Poletto, Vanni , Siligoni, Marco
摘要： The broad-band integrator uses bipolar transistors with single low-value integration capacitor, that is why it is easy to integrate. A bias circuit, which can be integrated, allows both the gain-bandwidth product (GB) and the absolute values of the currents in the transistors to be programmed by two external resistors.
A plurality of integrators, typically sixteen, can be connected to the same bias circuit thanks to their small powercon- sumption.摘要翻译： 宽带积分器采用双极晶体管和单个低价值集成电容，因此易于集成。 可以集成的偏置电路允许增益带宽乘积（G * B）和晶体管中的电流绝对值由两个外部电阻编程。 多个积分器，通常为16个，由于其小功率消耗，可以连接到相同的偏置电路。
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59.发明公开Intégrateur exponentiel à constante de temp élevée, réalisé avec des capacités commutées 失效配有开关电容器的大时间常数指数积分器
公开(公告)号：EP0143024A1
公开(公告)日：1985-05-29
申请号：EP84402014.9
申请日：1984-10-08
CPC分类号： H03H19/004 , G06G7/184 , G06G7/1865
摘要： L'invention concerne les circuits à capacités commutées.
Pour réaliser un intégrateur exponentiel à capacités commutées à grande constante de temps, on prévoit, au lieu d'utiliser seulement une capacité non commutée (C) et une capacité commutée (Ce) analogue à une résistance, trois ensembles (10, 20, 30) de capacités commutées (Ce, Cs, Cp) un amplificateur opérationnel (AO) et une capacité non commutée C. La constante de temps est multipliée en gros par le rapport Cs/Cp.摘要翻译： 1.一种具有开关电容器的指数积分器电路，其特征在于，它包括三个单元，每个单元包括一个开关电容器，分别在一侧连接到公共点（P），第一单元（10）在另一侧连接到 所述电路的输入（E），所述第二单元（20）连接到作为电压跟随器安装并具有单位增益的运算放大器（AO）的输出，并且所述第三单元（30）连接到所述电路的输出（S） 并且与运算放大器的非反相输入端相连，未切换的电容器（C）被连接在电路的输出端（S）和电接地端子之间。
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