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552 条记录 (耗时 0.022 秒)

    Network switch with shared memory system
    71.
    发明公开
    Network switch with shared memory system 失效
    与交错存储器系统网络交换机

    公开(公告)号：EP0854608A3

    公开(公告)日：1999-06-16

    申请号：EP97310676.8

    申请日：1997-12-30

    申请人： Compaq Computer Corporation

    发明人： Mayer, Dale J. ,  Richter, Roger ,  Witkowski, Michael L. ,  Kotzur, Gary B. ,  Hareski, Patricia E. ,  Walker, William J.

    IPC分类号： H04L12/28

    CPC分类号： H04L49/103 ,  H04L49/201 ,  H04L49/205 ,  H04L49/254 ,  H04L49/351

    摘要： A network switch including a central memory that stores device identification information, port numbers, control information, and packet data received at the ports of the switch. The memory includes a packet section that stores packet data and a device identification section that stores identification entries, where each entry corresponds to a network device coupled to a port of the switch. The switch includes a switch manager to control data flow between the ports and the central memory. Each of the identification entries includes a unique network address to identify one of the network devices and a port number to identify one of the network ports. Each of the identification entries is located within the central memory at a hash address derived by hashing the unique network address. Hash logic receives and hashes each network address to determine a hash address, which is used to access the identification entries. The memory is organized into a chain structure to enable quick access of entries. The switch manager further includes a control memory for storing control registers, including a freepool control register for identifying a freepool chain of memory sectors, a receive control register for identifying a corresponding receive sector chain and a transmit control register for identifying a corresponding transmit packet chain for each of the ports.

    Network switch with statistics read accesses
    72.
    发明公开
    Network switch with statistics read accesses 失效
    网络交换网与读访问统计

    公开(公告)号：EP0854606A3

    公开(公告)日：1999-06-16

    申请号：EP97310652.9

    申请日：1997-12-30

    申请人： Compaq Computer Corporation

    发明人： Hareski, Patricia E. ,  Walker, William J. ,  Kotzur, Gary B. ,  Mayer, Dale J. ,  Witkowski, Michael L.

    IPC分类号： H04L12/24 ,  H04L12/44 ,  H04L12/40 ,  H04L12/56

    CPC分类号： H04L41/26 ,  H04L41/046 ,  H04L41/24 ,  H04L49/201 ,  H04L49/351 ,  H04L49/354

    摘要： A network switch including a plurality of network ports for receiving and transmitting data, where each port includes at least one statistics register for storing statistics information, such as Ethernet statistical and configuration information. The switch also includes a switch manager, which further includes a memory, retrieval logic for detecting a statistics request signal and for respondingly retrieving the statistics information for storage in the memory, and response logic for asserting a statistics response signal after the statistics information is stored. A processor is coupled to the switch manager through a bus, where the processor asserts the statistics request signal and then detects assertion of the statistics response signal. Upon detecting the response signal, the processor retrieves the statistics information from the memory. In this manner, the processor is removed from direct connection to the statistics registers and free to complete other tasks while the information is being gathered by the switch manager, thereby increasing the efficiency of the processor and of the network switch. Each port preferably includes a network interface, a processor port interface for enabling the switch manager to retrieve the statistical information, and a data bus interface for network traffic. The switch manager thus includes two separate bus connections to each of the ports, so that statistical reads do not interfere with network data packet flow.

    A network switch
    74.
    发明公开
    A network switch 失效
    网络交换机

    公开(公告)号：EP0804005A3

    公开(公告)日：1998-09-09

    申请号：EP97302770

    申请日：1997-04-23

    申请人： COMPAQ COMPUTER CORP

    发明人： SCHNELL ARNOLD THOMAS

    IPC分类号： H04L12/56 ,  H04L12/28

    CPC分类号： H04L45/745 ,  H04L49/101 ,  H04L49/201 ,  H04L49/351 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9031

    摘要： A network switch for transferring packets of information including a plurality of shared packet buffers for a plurality of network ports. The network switch includes a switch matrix for providing independent input and output data channels between any one of the packet buffers and any of the network ports. The network switch further includes a switch controller for controlling transfer of data packets between the network ports and the packet buffers. In this manner, all of the packet buffers are shared and accessible by any of the network ports through the switch matrix. Each of the packet buffers stores only one data packet at a time, although the packet buffers may also be expanded to store multiple packets. The switch matrix includes an input switch with inputs coupled to the network ports and outputs coupled to the packet buffers and programmable crosspoint connections. Furthermore the switch matrix includes an output switch with inputs coupled to the packet buffers and outputs coupled to the network ports and programmable crosspoint connections. A packet processor is also included for handling new address and for duplicating packets if multicast or broadcast.

    Network switch with shared memory system
    76.
    发明公开
    Network switch with shared memory system 失效
    Netzwerkschalter mit verschachteltem Speichersystem

    公开(公告)号：EP0854608A2

    公开(公告)日：1998-07-22

    申请号：EP97310676.8

    申请日：1997-12-30

    申请人： Compaq Computer Corporation

    发明人： Mayer, Dale J. ,  Richter, Roger ,  Witkowski, Michael L. ,  Kotzur, Gary B. ,  Hareski, Patricia E. ,  Walker, William J.

    IPC分类号： H04L12/28

    CPC分类号： H04L49/103 ,  H04L49/201 ,  H04L49/205 ,  H04L49/254 ,  H04L49/351

    摘要： A network switch including a central memory that stores device identification information, port numbers, control information, and packet data received at the ports of the switch. The memory includes a packet section that stores packet data and a device identification section that stores identification entries, where each entry corresponds to a network device coupled to a port of the switch. The switch includes a switch manager to control data flow between the ports and the central memory. Each of the identification entries includes a unique network address to identify one of the network devices and a port number to identify one of the network ports. Each of the identification entries is located within the central memory at a hash address derived by hashing the unique network address. Hash logic receives and hashes each network address to determine a hash address, which is used to access the identification entries. The memory is organized into a chain structure to enable quick access of entries. The switch manager further includes a control memory for storing control registers, including a freepool control register for identifying a freepool chain of memory sectors, a receive control register for identifying a corresponding receive sector chain and a transmit control register for identifying a corresponding transmit packet chain for each of the ports.

    摘要翻译： 一种网络交换机，包括存储在交换机的端口处接收的设备标识信息，端口号，控制信息和分组数据的中央存储器。 存储器包括存储分组数据的分组部分和存储标识条目的设备标识部分，其中每个条目对应于耦合到交换机的端口的网络设备。 交换机包括一个交换机管理器来控制端口和中央存储器之间的数据流。 每个标识条目包括唯一的网络地址以识别网络设备之一和用于识别其中一个网络端口的端口号。 每个识别条目位于中央存储器内的哈希地址处，通过散列唯一的网络地址而导出。 散列逻辑接收和散列每个网络地址以确定用于访问标识条目的散列地址。 存储器被组织成链结构以便能够快速访问条目。 开关管理器还包括用于存储控制寄存器的控制存储器，包括用于识别存储器扇区的freepool链的freepool控制寄存器，用于识别对应的接收扇区链的接收控制寄存器和用于识别对应的发送分组链的发送控制寄存器 为每个端口。

    Cell routing in atm networks
    77.
    发明公开
    Cell routing in atm networks 失效
    Leitweglenkung von Zellen在ATM-Netzen

    公开(公告)号：EP0810759A1

    公开(公告)日：1997-12-03

    申请号：EP97201621.6

    申请日：1997-05-30

    申请人： MMC Networks, Inc.

    发明人： Joffe, Alex

    IPC分类号： H04L12/56 ,  H04Q11/04

    CPC分类号： H04L49/309 ,  H04L49/201 ,  H04L49/25 ,  H04L49/256 ,  H04L49/3009 ,  H04L49/552 ,  H04Q11/0478

    摘要： In an ATM switch, an input port number, an input VPI and an input VCI are used to generate a header appended to the cell when the cell is transmitted. The input port number and the input VPI are combined to form a pointer to a look-up table (LUT). The LUT entry contains a first portion of a pointer to an Input Translation Table (ITT). An ITT entry provides sufficient information to generate the header. The LUT entry contains also some or all of the bits of a mask to be applied to the input VCI to obtain a second portion of the pointer to the ITT. The number of the mask bits is variable. All the mask bits are 1. The mask bits are separated from the first portion of the ITT pointer by a 0 bit.

    摘要翻译： 在ATM交换机中，当发送小区时，使用输入端口号，输入VPI和输入VCI来生成附加到单元的标题。 输入端口号和输入VPI被组合以形成到查找表（LUT）的指针。 LUT条目包含指向输入转换表（ITT）的指针的第一部分。 ITT条目提供足够的信息来生成标题。 LUT条目还包含要应用于输入VCI的掩码的一些或全部比特以获得指向ITT的指针的第二部分。 掩码位的数量是可变的。 所有掩码位均为1.掩码位与ITT指针的第一部分分开一个0位。

    Multi-bit parallel switching networks
    78.
    发明公开
    Multi-bit parallel switching networks 失效
    多位并行切换网络

    公开(公告)号：EP0571153A3

    公开(公告)日：1997-10-22

    申请号：EP93303776.4

    申请日：1993-05-17

    申请人： XEROX CORPORATION

    发明人： Lyles, Joseph B.

    IPC分类号： H04L12/56

    CPC分类号： H04L49/201 ,  H04L49/106 ,  H04L49/1507 ,  H04L49/1553 ,  H04L49/1561 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/3081 ,  H04L49/508

    摘要： A switch having a non-blocking, self-routing switching fabric (41) for routing data packets from the input ports to the output ports of the switching fabric in accordance with a virtual circuit designation and an output port address that is carried by each data packet requires that the output port address for each of the data packets being specified by the first few bits of a switch header that is appended to said packet. The switching fabric (41) advantageously is composed of a plurality of parallel connected single bit wide sorting networks followed by a plurality of parallel connected routing networks for providing multi-bit wide data paths between its input ports and its output ports. Moreover, the switching fabric (41) is constructed to have one multi-bit wide sorting network and a plurality of multi-bit wide routing networks for giving plural input ports simultaneous access to identical output ports. For that reason, the address bits for each of the packets are transmitted in bit parallel on all bits of said multi-bit wide data path, together with a prepended stopper ID that distinquishes each data packet from any other data packet that can be simultaneously routed to the same output port of said switching fabric (41), thereby preventing data packets from different inputs from being intermingled at said output ports.

    A method for distribution of utilization data in ATM networks and a communication network therefor
    79.
    发明公开
    A method for distribution of utilization data in ATM networks and a communication network therefor 失效
    自由网络中的Verfilren zum Verteilen von Nutzdaten Kommunikationsnetz

    公开(公告)号：EP0740441A2

    公开(公告)日：1996-10-30

    申请号：EP96302904.6

    申请日：1996-04-24

    申请人： SUN MICROSYSTEMS INC.

    发明人： Cidon, Israel ,  Hsiao, Man-Tung Tony ,  Rom, Raphael ,  Jujjavarapu, Phanindra ,  Sidi, Moshe ,  Khamisy, Asad

    IPC分类号： H04L12/56 ,  H04L12/18

    CPC分类号： H04L45/02 ,  H04L12/185 ,  H04L45/10 ,  H04L45/48 ,  H04L49/201 ,  H04L49/25 ,  H04L49/256 ,  H04L49/3081 ,  H04L2012/5619

    摘要： In a communication network having a set of hosts and switch based label swapping communication nodes, each node has a control processor that is also a host that sends and receives messages via the switching apparatus in its associated node. At least one of the hosts includes a distribution tree set up procedure. That procedure stores source and destination data designating a set of source hosts and a set of destination hosts in the communication network, and defines a distribution tree of virtual connections. The designated source hosts and destination hosts may include the control processors of some or all the network nodes. The defined virtual connections include a virtual connection from each designated source host to all of the designated destination hosts, and message labels for all messages sent by the source hosts to be routed to the destination nodes. The virtual connections convey each message from the source hosts that have the defined message labels to all the designated destination hosts as a single multicast message. The message labels are defined so that overlapping portions of the virtual connections use the same message labels. All the nodes in the distribution tree are programmed by sending one or more virtual connection set up messages that instruct the nodes in the distribution tree on the label swapping data to be stored in each such node.

    摘要翻译： 在具有一组主机和基于交换机的标签交换通信节点的通信网络中，每个节点具有控制处理器，该控制处理器也是经由其关联节点中的交换设备发送和接收消息的主机。 至少有一个主机包括分发树设置过程。 该过程存储在通信网络中指定一组源主机和一组目的主机的源和目的地数据，并且定义虚拟连接的分发树。 指定的源主机和目的主机可以包括一些或所有网络节点的控制处理器。 定义的虚拟连接包括从每个指定的源主机到所有指定的目标主机的虚拟连接，以及由源主机发送的要路由到目标节点的所有消息的消息标签。 虚拟连接将来自具有定义的消息标签的源主机的每个消息作为单个多播消息传送到所有指定的目的地主机。 消息标签被定义为使得虚拟连接的重叠部分使用相同的消息标签。 通过发送一个或多个虚拟连接建立消息来编配分发树中的所有节点，该消息指示分发树中的节点将标签交换数据存储在每个这样的节点中。