公开(公告)号：EP1230805B1

公开(公告)日：2008-11-19

申请号：EP99958616.7

申请日：1999-11-11

申请人： STMicroelectronics Asia Pacific Pte Ltd.

发明人： Hui, Yau Wai Lucas

IPC分类号： H04N17/00

CPC分类号： H04N17/004 ,  H04N17/00

摘要： A method and apparatus for noise level estimation in a digital video signal, the apparatus including a pixel activity detector (102) which produces a mean pixel activity level for each picture in the video signal, a contrast analyser (106) which produces a contrast activity level for each picture and a noise level calculator (104) which is coupled to the activity detector and contrast analyser to produce an estimated noise level by offsetting the contrast activity level from accumulated output of the activity detector.

公开(公告)号：EP1974541A2

公开(公告)日：2008-10-01

申请号：EP07718101.4

申请日：2007-01-17

申请人： STMICROELECTRONICS SA ,  STMicroelectronics Asia Pacific Pte Ltd.

发明人： LEBOWSKY, Fritz ,  HUANG, Yong

IPC分类号： H04N5/208

CPC分类号： H04N5/208

摘要： The invention concerns a device for processing a digital image comprising at least one contour region, including sharpness processing of the contour region. The sharpness processing includes converting data of the level of pixels of the contour zone into initial main data (step 2), ranging between a minimum value, for example 0 and a main value based on the amplitude of the contour, a sharpness sub-processing performed on said initial main data so as to obtain final main data (steps 3 to 10), and converting the final main data into final data of levels (step 11).

公开(公告)号：EP1667110B1

公开(公告)日：2008-08-13

申请号：EP05256908.4

申请日：2005-11-08

申请人： STMicroelectronics Asia Pacific Pte Ltd.

发明人： Padhi, Kabi P. ,  Kumar, Sudhir K. ,  George, Sapna

IPC分类号： G10L19/00

CPC分类号： G10L19/005

公开(公告)号：EP1944967A2

公开(公告)日：2008-07-16

申请号：EP07150031.8

申请日：2007-12-14

申请人： STMicroelectronics Asia Pacific Pte Ltd.

发明人： Chua, Lookah ,  Desprez-le-Goarant, Yann

IPC分类号： H04N5/235

CPC分类号： H04N5/2357

摘要： The present disclosure provides a method for detecting flicker DC voltage offset. The method includes receiving an output signal of an image sensor, the output signal comprising a reference signal and an image signal, and generating a combined signal by combining the image signal with a peak flicker DC voltage signal during a first time period. The method also includes performing an auto zero function in an auto zeroing comparator during the first time period between the reference signal and the combined signal and comparing the reference signal and the image signal with the auto zeroing comparator during a second time period subsequent to the first time period. The method further include storing a first charge corresponding to the image signal during a second time period and storing a second charge corresponding to a current peak flicker DC. voltage signal. The method also includes comparing the image signal to the current peak flicker DC voltage signal, and producing the greater of the image signal and the stored peak flicker DC voltage signal as the peak flicker DC voltage signal.

公开(公告)号：EP1921604A1

公开(公告)日：2008-05-14

申请号：EP07254402.6

申请日：2007-11-07

申请人： STMicroelectronics Asia Pacific Pte Ltd.

发明人： Zong, Wenbo ,  Wu, Yuan ,  George, Sapna

IPC分类号： G10K15/12

CPC分类号： G10K15/12

摘要： An device and method of generating environmental reverberation effects for digital audio signals is presented. The device includes a reverberation controller (500). The reverberation controller (500) pre-processes (502) one or more predetermined characteristics of a first audio signal (514) to produce a pre-processed signal and generates a plurality of delayed outputs (504) from the pre-processed signal, each output having a predetermined delay. The reverberation controller also produces a plurality of reflection outputs from the plurality of delayed outputs and combines the plurality of reflection outputs to produce a second audio signal having a desired reverberation response.

摘要翻译： 提出了一种产生数字音频信号环境混响效果的装置和方法。 该装置包括混响控制器（500）。 混响控制器（500）预处理（502）第一音频信号（514）的一个或多个预定特性以产生预处理的信号，并且从预处理信号产生多个延迟输出（504），每个 输出具有预定的延迟。 混响控制器还产生来自多个延迟输出的多个反射输出并组合多个反射输出以产生具有期望的混响响应的第二音频信号。

公开(公告)号：EP1887517A1

公开(公告)日：2008-02-13

申请号：EP07253086.8

申请日：2007-08-06

申请人： STMicroelectronics Asia Pacific Pte Ltd.

发明人： Chiang, Patricia Wei Yin ,  Wai, Hui Yau

IPC分类号： G06T5/40 ,  H04N5/202

CPC分类号： H04N5/20 ,  G06T5/009 ,  G06T5/40 ,  G06T2207/10016

摘要： A process for enhancing contrast of an image having pixels in different brightness intensities is disclosed. An image processor for enhancing contrast of an image having pixels is disclosed. A display having a receiver, an image processor according to the preceding, and a screen is also disclosed.

摘要翻译： 公开了一种用于增强具有不同亮度强度的像素的图像的对比度的方法。 公开了一种用于增强具有像素的图像的对比度的图像处理器。 还公开了具有接收机，根据前述的图像处理器和屏幕的显示器。

公开(公告)号：EP1883160A1

公开(公告)日：2008-01-30

申请号：EP06425538.3

申请日：2006-07-28

申请人： STMicroelectronics S.r.l. ,  STMicroelectronics Asia Pacific Pte Ltd. ,  Hynix Semiconductor Inc.

发明人： Seo, Donghyun ,  Mulatti, Jacopo ,  Kang, Taegyoung

IPC分类号： H03K17/22 ,  G01F1/24 ,  G01F1/28

CPC分类号： H03K17/223 ,  G06F1/24 ,  G06F1/28

摘要： A power on reset circuit for initializing at power on a digital integrated circuit comprising a first power on reset signal generator (PORE_GEN) supplied by an externally applied power supply voltage (VDDE), generating a first or external power on reset signal (PORE) during external power supply voltage (VDDE) ramp up, a reference voltage generator (REF_GEN) powered by said externally applied power supply voltage (VDDE) when enabled by said first power on reset signal (PORE) for generating a stable compensating reference voltage (VREF_VDC), a voltage down converter circuit (VDC) converting the externally applied power supply voltage (VDDE) to a stable regulated internal supply voltage (VDDI) employing said reference voltage (VREF_VDC) generated by the reference voltage generator, and a second or internal power on reset signal generator circuit (PORI_GEN) supplied at said stable regulated internal supply voltage (VDDI) and generating a second power on reset signal (PORI) conveyed to core parts of the integrated circuit for initializing them at power on, has the second internal power on reset signal generator circuit with enablement means for enabling also the second internal power on reset signal generator circuit with the first power on reset signal (PORE) together with the voltage down converter circuit (VDC).
Fuse means permit optimization of dynamical responses of the two reset generators for selectably supported external power supply voltages.

摘要翻译： 一种通电复位电路，用于在数字集成电路上通电时进行初始化，所述数字集成电路包括由外部施加的电源电压（VDDE）提供的第一通电复位信号发生器（PORE_GEN），其在生成期间产生第一或外部通电复位信号（PORE） 当由所述第一通电复位信号（PORE）启用时，外部电源电压（VDDE）斜升，由所述外部施加的电源电压（VDDE）供电的参考电压发生器（REF_GEN），用于产生稳定的补偿参考电压（VREF_VDC） ，使用由参考电压发生器产生的所述参考电压（VREF_VDC）将外部施加的电源电压（VDDE）转换为稳定的经调节的内部电源电压（VDDI）的降压转换器电路（VDC），以及第二或内部电源 在所述稳定的经调节的内部电源电压（VDDI）处提供的复位信号发生器电路（PORI_GEN），并产生传送给cor的第二加电复位信号（PORI） 用于在通电时初始化它们的部分集成电路具有第二内部通电复位信号发生器电路，其具有启用装置，用于启用具有第一通电复位信号（PORE）的第二内部通电复位信号发生器电路以及 降压转换器电路（VDC）。 保险丝意味着可以优化两个复位发生器对于有选择支持的外部电源电压的动态响应。

公开(公告)号：EP1808851A1

公开(公告)日：2007-07-18

申请号：EP07250083.8

申请日：2007-01-10

申请人： STMicroelectronics Asia Pacific Pte Ltd.

发明人： Kurniawati, Evelyn ,  Sapna, George

IPC分类号： G10L19/02

CPC分类号： G10L19/02

摘要： A method for stereo audio perceptual encoding of an input signal includes masking threshold estimation and bit allocation. The masking threshold estimation and bit allocation are performed once every two encoding processes. Another method for stereo audio perceptual encoding of an input signal includes performing a time-to-frequency transformation, performing a quantization, performing a bitstream formatting to produce an output stream, and performing a psychoacoustics analysis. The psychoacoustics analysis includes masking threshold estimation on a first of every two successive frames of the input signal.

摘要翻译： 一种用于将输入信号的立体声音频感知编码方法包括掩蔽阈值估算和位分配。 掩蔽阈值估算和位分配被执行一次每两个编码处理。 用于将输入信号的立体声音频感知编码的另一种方法包括：执行时间 - 频率变换，进行量化，执行比特流格式化，以产生在输出流，以及执行心理声学分析。 心理声学分析包括在第一输入信号的每两个连续帧的掩蔽阈值估计。

公开(公告)号：EP1480166B1

公开(公告)日：2006-10-04

申请号：EP04102100.7

申请日：2004-05-13

申请人： STMicroelectronics Asia Pacific Pte Ltd

发明人： Chiang, Patricia Wei Yin

IPC分类号： G06T5/00

CPC分类号： G06T5/003 ,  G06T2200/12 ,  G06T2207/20192

公开(公告)号：EP1551202A3

公开(公告)日：2006-06-14

申请号：EP04258024.1

申请日：2004-12-21

申请人： STMicroelectronics Asia Pacific Pte Ltd

发明人： Muthiah, Vijay N.

IPC分类号： H04L29/08 ,  H04L12/56

CPC分类号： H04L47/10 ,  H04L47/14 ,  H04L47/24 ,  H04L47/2491 ,  H04L47/28 ,  H04L47/30 ,  H04L67/322 ,  H04W28/18

摘要： A system and method is disclosed for selecting an optimal transport format combination using progressive set reduction. A base station in a third generation wireless telecommunication system assigns a transport format combination set to user equipment (UE). The system and method (1400) of the invention selects a best-fit transport format combination (TFC) by progressively identifying TFC candidates in the transport format combination set that are not best-fit candidates in the UE (1440). The system and method of the invention progressively reduces the complete TFC Set to a much smaller TFC Set to be searched through (1460) for the best-fit TFC at most times in the UE. This significantly reduces the search time in the UE. The non best-fit candidates are progressively deleted until only one TFC candidate remains. The sole remaining TFC candidate is the optimal best-fit TFC candidate (1460).