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公开(公告)号：EP0625755A3
公开(公告)日：1995-08-09
申请号：EP94302778.9
申请日：1994-04-20
IPC分类号： G06F15/36
CPC分类号： G01R19/2506 , G01R19/25 , G06F17/18
摘要： The median value of a set of voltage values is found by a technique that minimizes the circuitry while maximizing the speed, and also provides for dropouts. The voltage values, illustratively five in number (e.g., V₁ ... V₅), are applied in pairs to the inputs of ten comparators (e.g., 100 ... 109). The outputs of the comparators, and their complements, are formed into five "status words" (e.g., W₁ ... W₅) of four bits each (e.g., C₁₂, C₁₃, C₁₄, C₁₅, ... C₅₁, C₅₂, C₅₃, C₅₄), such that each bit of a given status word represents the comparison of a given value with another of the values. status word represents the comparison of a given value with another of the values. The status word that contains two l's and two 0's represents the median value. In a preferred circuit embodiment, this status word is rapidly determined in a series of three logic stages, wherein the highest and lowest values are eliminated in the first stage (e.g., Fig. 2), the next highest and lowest are eliminated in the second stage (e.g., Fig. 3), and the last stage (e.g., 400 ... 404) determines the remaining status word that is associated with the median value. This technique also readily provides for dropouts by initializing the logic circuitry. For example, the fifth status word (associated with the fifth value) is preset to 1111, so that if any single value is not received, the missing value is not chosen as the median. Additional dropouts may be similarly treated to ensure that the median is chosen only from the voltage values actually received. This technique may be used, for example, in a disk drive system, where the position of a servo head must be precisely controlled.
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公开(公告)号：EP0364162A3
公开(公告)日：1991-08-07
申请号：EP89310210
申请日：1989-10-05
IPC分类号： G02B6/122 , G02B6/12 , G02F1/313 , G02F1/35 , G02F3/00 , G02F3/02 , G11C13/04 , G11C21/00 , H01S3/10
摘要： Data is written, stored in the optical memory device and read out in optical form without any conversion to electronics. The functions performed such as readout, reset and the like can be via electronic means, optical means, or a combination of both. The inherent bistability/hysteresis which is required for the memory function is obtained with a laser structure which includes a saturable absorber and, as a portion of the cavity, a waveguide.
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4.发明公开
公开(公告)号：EP0228696A3
公开(公告)日：1988-11-23
申请号：EP86117955
申请日：1986-12-23
发明人： BENVENUTO, NEVIO , BERTOCCI, GUIDO
CPC分类号： H03M3/042
摘要： In an ADPCM coder l00 and decoder including a so-called locking-unlocking adaptation speed control l06, the adaptation speed is locked to a very slow, almost constant, speed of adaptation for voiceband data and partial band energy signals, i.e., tones and tone like signals, and is unlocked to achieve a fast speed of adaptation for speech. When a so-called partial band energy signal is being inputted, the adaptation speed is biased (via l06) toward the unlocked state and when a transition occurs from a partial band energy signal to another such signal, the adaptation speed is set to the totally unlocked state and coefficients of an adaptive predictor l02 are set to prescribed values. This is done in both the coder and decoder to minimize generation of impulse noise in the decoder output.
摘要翻译： 在包括所谓的锁定解锁自适应速度控制的ADPCM编码器和解码器中，自适应速度被锁定到语音频带数据和部分频带能量信号（即音调和音调信号）的非常慢，几乎恒定的适应速度 并且被解锁以实现用于语音的快速适应速度。 当输入所谓的部分频带能量信号时，自适应速度被偏向于解锁状态，并且当从部分频带能量信号到另一个这样的信号发生转变时，自适应速度被设置为完全解锁状态，系数 的自适应预测器被设置为规定的值。 这在编码器和解码器中完成，以最小化解码器输出中的脉冲噪声的产生。
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公开(公告)号：EP0228685A3
公开(公告)日：1988-11-02
申请号：EP86117811
申请日：1986-12-19
发明人： GRIMES, GARY JOE
CPC分类号： G06F1/12 , H03K5/135 , H03K21/406 , H04J3/0688 , H04L7/0083
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公开(公告)号：EP0232586A3
公开(公告)日：1988-10-05
申请号：EP86308098
申请日：1986-10-20
IPC分类号： H01J29/18 , C09K11/08 , C09K11/77 , C30B19/02 , H01J29/20 , H01J29/24 , H01J29/26 , H01J31/10 , C09K11/80 , C30B29/28
摘要： Light output of single crystal phosphors used on cathode ray tubes can be vastly improved by use of a microfaceted surface structure conveniently produced by use of a single crystal epitaxial layer (e.g. 32) with lattice constant slightly larger than the single crystal substrate (e.g. 3l). Such epitaxial layers are conveniently grown using substituents that increase the lattice constant compared to the single crystal substrate.
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公开(公告)号：EP0211750A3
公开(公告)日：1988-08-17
申请号：EP86401677
申请日：1986-07-28
摘要： A parallel data transmission system (20) comprises a cable (40) which is capable of balanced mode transmission but which is driven in an unbalanced mode. The cable includes a plurality of twisted pairs of individually insulated conductors (42-42) enclosed by a metallic shield (54). The twist lengths are relatively short to cause the pairs to be decoupled sufficiently from one another to allow substantially error-free, parallel transmission over relatively long distances. Interposed between the core and the shield is a spacing member (52) which has a relatively low dielectric constant. Receiving facilities are provided for detecting whether the level of transmitted signals is above or below predetermined threshold values and for converting the received signals into one of two or more logic levels. Advantageously, this system increases substantially the distances over which substantially error-free transmission in an unbalanced mode can be accomplished.
摘要翻译： 并行数据传输系统（20）包括能够进行平衡模式传输但在非平衡模式下驱动的电缆（40）。 该电缆包括多个由金属屏蔽（54）围绕的单独绝缘导体（42-42）的双绞线。 扭曲长度相对较短以使得这些对彼此充分解耦以允许在相对较长的距离上基本无差错并行传输。 介于芯体和屏蔽体之间的是间隔构件（52），其具有相对低的介电常数。 提供接收设施用于检测所传输信号的电平是高于还是低于预定阈值，并用于将所接收信号转换为两个或更多个逻辑电平之一。 有利的是，该系统基本上增加了可以实现不平衡模式中的基本上无差错的传输的距离。
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公开(公告)号：EP0214593A3
公开(公告)日：1988-07-06
申请号：EP86112095
申请日：1986-09-02
发明人： Fergeson, Allen Dennis , Rouse, David Michael , Wallace, Richard Egbert , Zelms, Charles Michael , Darnell, Joseph William
CPC分类号： H04L12/56 , H04L12/437
摘要： A data communication network comprising a plurality of nodes interconnecting transmission paths (ring 01, ring 10) in a ring structure arranged to propagate data messages between data systems coupled to the network by the nodes in opposite directions around the network ring structure. An executive node (2) having ring interface units (212, 222, 232) interconnecting ones of the transmission paths is arranged to selectively couple a network control processor (3) with various sectors of the transmission paths to enable the network control processor (3) to control the traffic flow of data messages on the data communication network.
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公开(公告)号：EP0201281A3
公开(公告)日：1988-06-01
申请号：EP86303309
申请日：1986-05-01
发明人： Debus, Walter, Jr.
CPC分类号： H03H21/0012
摘要： An adaptive equalizer 200 is disclosed which includes a plurality of multiply-accumulate devices 201, 202, 203 and a rotating coefficient register 212. Each multiply-accumulate device multiplies each input signal sample by an associated coefficient in an ensemble, stores the result and periodically outputs the accumulated results as the equalized input signal. The rotating coefficient register successively associates each coefficient in the ensemble with a different multiply-accumulate device. Coefficient update circuitry 213, 230, 214, 216, 21 is also provided which periodically updates the coefficients in the ensemble so as to optimize equalizer performance.
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