CONTINUOUSLY CHARGED ISOLATED SUPPLY NETWORK FOR SECURE LOGIC APPLICATIONS
    1.
    发明公开
    CONTINUOUSLY CHARGED ISOLATED SUPPLY NETWORK FOR SECURE LOGIC APPLICATIONS 审中-公开
    连续充电用于安全逻辑应用的隔离供电网络

    公开(公告)号:EP3167443A1

    公开(公告)日:2017-05-17

    申请号:EP15741439.2

    申请日:2015-07-07

    申请人: Chaologix, Inc.

    IPC分类号: G09C1/00 H04L9/00

    摘要: A floating core network for secure isolation of a circuit from an external supply interface is described. Isolation of a core is accomplished through a dynamic current limiting network providing an isolated core voltage to the core; and an isolated supply for the corresponding core that is continuously recharged by the dynamic current limiting network. The dynamic current limiting network can include two control loops, one control loop providing a fixed gate voltage to a p-type transistor supplying current to the isolated supply and another control loop providing a fixed gate voltage to an n-type transistor sinking current from the isolated supply.

    摘要翻译: 描述了用于电路与外部电源接口的安全隔离的浮动核心网络。 核心的隔离是通过动态电流限制网络为核心提供隔离核心电压来实现的; 以及由动态电流限制网络连续充电的相应芯的隔离电源。 动态电流限制网络可以包括两个控制回路,一个控制回路向将电流提供给隔离电源的p型晶体管提供固定栅极电压,另一个控制回路将固定栅极电压提供给n型晶体管吸收来自 孤立的供应。

    CHARGE DISTRIBUTION CONTROL FOR SECURE SYSTEMS
    2.
    发明公开
    CHARGE DISTRIBUTION CONTROL FOR SECURE SYSTEMS 审中-公开
    电荷分布控制研究证明系统

    公开(公告)号:EP3005219A1

    公开(公告)日:2016-04-13

    申请号:EP14710108.3

    申请日:2014-02-20

    申请人: Chaologix, Inc.

    摘要: Advantageous analog and/or digital logic cells and methods of powering circuit blocks using the same are provided. A digital logic cell can include a charge storage device (12), a logic block (10), and connections to a power supply (14). The charge storage device may be a capacitor (12). The capacitor or other charge storage device (12) can be disconnected from the logic block (10) and a power supply (14) to discharge the capacitor (12), and then connected to the power supply (14), via the power supply connections (18, 20), to charge the capacitor (12). The capacitor (12) can be disconnected from a ground connection of the power supply while the capacitor is discharged. After being charged via the power supply (14), the capacitor (12) can also be disconnected from the power supply (14), including ground, and connected to the logic block (10) to power the logic block.

    COLCKED CHARGE DOMAIN LOGIC
    5.
    发明公开

    公开(公告)号:EP2917864A1

    公开(公告)日:2015-09-16

    申请号:EP13854026.5

    申请日:2013-10-30

    申请人: Chaologix, Inc.

    IPC分类号: G06F21/00 G06F21/70

    摘要: Advantageous digital logic cells and methods of powering logic blocks using the same are provided. A digital logic cell can include a charge storage device, a logic block, and connections to a power supply. The charge storage device may be a capacitor. The capacitor or other charge storage device can be disconnected from the logic block and a power supply to discharge the capacitor, and then connected to the power supply, via the power supply connections, to charge the capacitor. The capacitor can be disconnected from a ground connection of the power supply while the capacitor is discharged. After being charged via the power supply, the capacitor can also be disconnected from the power supply (including ground) and connected to the logic block to power the logic block.

    摘要翻译: 提供了有利的数字逻辑单元和使用其的逻辑块供电的方法。 数字逻辑单元可以包括电荷存储器件,逻辑块和连接到电源的连接。 电荷存储装置可以是电容器。 电容器或其他电荷存储设备可以从逻辑块和电源断开以使电容器放电,然后通过电源连接器连接到电源以对电容器充电。 在电容器放电时,电容器可以从电源的接地连接断开。 在通过电源充电后,电容器也可以从电源(包括地)断开,并连接到逻辑模块以为逻辑模块供电。

    DYNAMICALLY CONFIGURABLE LOGIC GATE USING A NONLINEAR ELEMENT
    6.
    发明公开
    DYNAMICALLY CONFIGURABLE LOGIC GATE USING A NONLINEAR ELEMENT 审中-公开
    动态配置逻辑门与非线性元件

    公开(公告)号:EP2095223A1

    公开(公告)日:2009-09-02

    申请号:EP07865921.6

    申请日:2007-12-20

    IPC分类号: G06F7/57

    CPC分类号: H03K19/173 H03K3/037

    摘要: A dynamically configurable logic gate includes an input summer for receiving a first input signal and a second input signal to generate a summed input signal. Further the dynamically configurable logic gate includes a nonlinear element that applies a nonlinear function to the summed input signal to produce a nonlinear output signal. The dynamically configurable logic gate output signal corresponds to one of a plurality of different logic gates responsive to adjusting the summed input signal and/or the nonlinear function. In another embodiment, the dynamically configurable logic gate includes feedback to one of the inputs. The dynamically configurable logic gate receives the two inputs and operates as one of a plurality of different logic gate types so as to produce an output signal that corresponds to a memory latch according to a selection of the control signal. An array structure of dynamically configurable logic elements is also disclosed.