ASYNCHRONOUS SERIAL ANALOG-TO-DIGITAL CONVERTER METHODOLOGY HAVING DYNAMIC ADJUSTMENT OF THE BANDWITH
    1.
    发明公开
    ASYNCHRONOUS SERIAL ANALOG-TO-DIGITAL CONVERTER METHODOLOGY HAVING DYNAMIC ADJUSTMENT OF THE BANDWITH 有权
    FOR SERIAL方法,具有动态带宽异步模数转换停产

    公开(公告)号:EP1530823A1

    公开(公告)日:2005-05-18

    申请号:EP03766396.0

    申请日:2003-07-31

    IPC分类号: H03M1/54

    CPC分类号: H03M1/125 H03M1/54 H03M1/60

    摘要: A new methodology is disclosed to convert analog electric signals into digital data. The method provides a serial scheme without pre-definition of the number of bits (dynamic range). It allows digital processing of the input signal without sampling and holding of the input signal. Processing of the input signal is clock-less and asynchronously dependent on the time-evolution of the input signal itself. Thereby, a programmable, dynamic adjustment of bandwidth (product of dynamic range and speed of conversion) of the analog-to-digital conversion process can be achieved depending on the characteristics of the input signal. Dynamic adjustment of the bandwidth is accomplished by digitally controlling a 'threshold' value at the input capacitor of the comparator, which when met by the input signal, triggers a transition at the output of the comparator.