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公开(公告)号：EP3518027A1
公开(公告)日：2019-07-31
申请号：EP17865463.8
申请日：2017-10-26
发明人： SUZUKI Jun , YOSHIZAWA Akihiro , NOZAKI Hideki , ENDOU Satoshi , FUKUTA Kenji , GOTO Hiroaki
摘要： A liquid crystal display including a liquid crystal panel of an active matrix type is provided. The liquid crystal display includes source lines and gate lines, pixel electrodes, switching elements, a source driver, a gate driver, and a failure inspection circuit. The source lines and the gate lines are disposed in a lattice form. The pixel electrode is disposed in a pixel region defined by the source line and the gate line. The switching element is disposed corresponding to the pixel electrode. The source driver drives the source lines. The gate driver drives the gate lines. The failure inspection circuit is connected to the source lines or the gate lines, and performs inspection of the source lines or the gate lines. The failure inspection circuit includes monitor input signal lines, monitor output signal lines, a determination circuit that detects voltage levels of output signals from the monitor output signal lines, and an expected value comparison circuit that compares outputs from the determination circuit with expected values.
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公开(公告)号：EP2267519B1
公开(公告)日：2018-05-09
申请号：EP10167238.4
申请日：2010-06-24
发明人： Kawabe, Shinichi
IPC分类号： G02F1/1335 , G02F1/1333 , G02F1/133
CPC分类号： G02F1/13338 , G02F1/133502 , G02F2201/38 , G02F2202/02
摘要： Provided is a display device which is the liquid crystal display device (12) in which the transparent interlayer (3) is provided between the liquid crystal display panel (1) and the transparent substrate (11) having a touch panel function and disposed on a front side of the liquid crystal display panel (1). In the liquid crystal display device (12), the outermost periphery of the transparent interlayer (3) is shaped like a frame, and the same material is used to form a frame-shaped transparent interlayer (7) and the transparent interlayer (3) that constitutes an entire display area to prevent the liquid material of the interlayer (3) leaking out of the liquid crystal display device (12) during manufacture of a product or while the product is in use.
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公开(公告)号：EP2400501B1
公开(公告)日：2015-08-12
申请号：EP11171320.2
申请日：2011-06-24
CPC分类号： G11C19/28 , G09G3/3674 , G09G3/3677 , G09G3/3688 , G09G2300/0413 , G09G2300/0465 , G09G2310/0283 , G09G2310/0286 , G09G2310/061 , G09G2310/08
摘要： A plurality of cascaded unit register circuits (38) which comprises a bidirectional shift register (30) include main stages and dummy stages at the top before the main stages and dummy stages at the bottom after the main stages. A k-th stage outputs a pulse P k in synchronization with a clock signal with a reference point N1 being at H level. The main stages include terminals NSF and NSB for setting N1 to H to which P k - 1 and P k+1 are input, respectively, and terminals NRB and NRF for setting N1 to L level to which P k - 2 and P k+2 are input, respectively. The order of generation of clock signals is reversed according to the direction of a shift, and whether a start trigger signal is applied to a top stage or a bottom stage is switched. Top dummy stages do not have NRB. Bottom dummy stages do not have NRF.
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公开(公告)号：EP2244171A3
公开(公告)日：2014-06-18
申请号：EP10160504.6
申请日：2010-04-20
发明人： Sekiguchi, Shinji , Nagata, Koji , Hayakawa, Kouji , Mamba, Norio
摘要： An electrostatic capacitive coupling-type touch panel is provided which interacts not only with a finger-based input but also with a touch using non-conductive input means. The touch panel includes coordinate detection electrodes (XP1 - XP4, YP1 - YP4) for detecting XY position coordinates and transparent Z electrodes. The Z electrodes are arranged over the coordinate detection electrodes (XP1 - XP4, YP1 - YP4) at certain intervals with spacers (4) disposed therebetween. An elastic layer (5) that is deformed along the shape of the spacers (4) by compressive force resulting from touch pressing presses the Z electrodes.
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公开(公告)号：EP2163943B8
公开(公告)日：2014-03-05
申请号：EP09011210.3
申请日：2009-09-01
发明人： Yamada, Yasuyuki , Sugiyama, Saori
IPC分类号： G02F1/1345
CPC分类号： G02F1/1345 , G02F2001/13456 , G02F2001/13606 , G02F2001/136218
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6.发明公开Liquid crystal display device, substrate producing method 审中-公开Flüssigkristallanzeigevorrichtungund Substratherstellungsverfahren
公开(公告)号：EP2434338A2
公开(公告)日：2012-03-28
申请号：EP11183107.9
申请日：2011-09-28
发明人： Anjo, Kenji , Ootani, Tomohiko
IPC分类号： G02F1/1362 , G02F1/1343
CPC分类号： G02F1/134336 , G02F1/134363 , G02F1/13458 , G02F1/136286 , G02F1/1368 , G02F2001/134318 , G02F2001/134372 , G02F2001/136231 , G02F2001/13629
摘要： In a liquid crystal display device of IPS mode with a smaller number of layers, a gate electrode (101) is formed on a TFT substrate (100). A gate insulating film (102) is formed to cover the gate electrode, on which a semiconductor layer (103) is formed. A drain electrode (104) and a source electrode (105) are placed on the semiconductor layer. A planar pixel electrode (106) is formed from ITO on the gate insulating film (102) prior to the formation of the drain electrode (104), source electrode (105), image signal line (20), and the like. This process is performed to prevent the image signal line (20), the drain electrode (104), the source electrode (105), and the like, from being consumed by the cell reaction through a developer (300) during the patterning of the ITO when a pin hole is present in the ITO, in order not to cause disconnection. As a result, it is possible to improve the production yield and achieve high reliability.
摘要翻译： 在具有较少层数的IPS模式的液晶显示装置中，在TFT基板（100）上形成栅电极（101）。 形成栅极绝缘膜（102）以覆盖形成有半导体层（103）的栅电极。 漏电极（104）和源电极（105）被放置在半导体层上。 在形成漏电极（104），源极（105），图像信号线（20）等之前，在栅极绝缘膜（102）上由ITO形成平面像素电极（106）。 执行该处理以防止图像信号线（20），漏电极（104），源电极（105）等在图案化期间通过显影剂（300）被电池反应消耗 ITO中存在针孔时的ITO，以免导致断开。 结果，可以提高生产率并实现高可靠性。
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公开(公告)号：EP1087255B1
公开(公告)日：2012-03-28
申请号：EP00119389.5
申请日：2000-09-11
IPC分类号： G02F1/1343 , G02F1/1362
CPC分类号： G02F1/134363 , G02F1/13439 , G02F1/136213
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公开(公告)号：EP2392996A2
公开(公告)日：2011-12-07
申请号：EP11168485.8
申请日：2011-06-01
发明人： Kouichi, Anno , Takumi, Sato , Masahiro, Teramoto
IPC分类号： G06F3/041
CPC分类号： G02F1/136259 , G02F1/133305 , G02F1/13338 , G02F1/133512 , G02F1/133514 , G02F1/1339 , G02F1/134309 , G02F1/13439 , G02F1/136286 , G02F1/1368 , G02F2001/133302 , G02F2001/136263 , G02F2201/121 , G02F2201/123 , G02F2202/28 , G06F3/041 , G06F3/0412 , G06F3/0416 , G06F3/044 , G06F2203/04102 , G06F2203/04103
摘要： A display device comprises a coordinate input device (TP) including a transparent substrate (SUB3) having a first signal interconnect (SIG1) disposed outside a detection region and having one end connected to the detection electrodes and being formed with a first electrode terminal at the other end thereof, and a flexible interconnect substrate (FPC2) connected to the first electrode terminal; and a display panel (PNL) for image display; wherein the coordinate inputting device has a second signal interconnect (SIG2) disposed outside the first signal interconnect near the peripheral edge of the transparent substrate, the second signal interconnect surrounding the area where the detection region is included and the first signal interconnect is formed and being opened at opposite ends thereof and connected to respective electrode terminals for inspection, wherein the second signal interconnect is formed of a thin conductive film disposed along the peripheral edge portion of the transparent substrate.
摘要翻译： 显示装置包括坐标输入装置（TP），该坐标输入装置（TP）包括透明基板（SUB3），该透明基板具有设置在检测区域外侧的第一信号互连（SIG1），并且一端连接到检测电极，并且在该第一电极端子 和连接到第一电极端子的柔性互连基板（FPC2）; 和用于图像显示的显示面板（PNL）; 其中所述坐标输入装置具有设置在所述透明基板的周缘附近的所述第一信号互连附近的第二信号互连（SIG2），围绕包括所述检测区域的区域的第二信号互连和形成所述第一信号互连 在其两端开口并连接到相应的电极端子用于检查，其中第二信号互连由沿着透明基板的周边部分设置的薄导电膜形成。
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公开(公告)号：EP2251735B1
公开(公告)日：2019-08-21
申请号：EP10005038.4
申请日：2010-05-12
IPC分类号： G02F1/1335 , G02B5/30
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公开(公告)号：EP2216816B1
公开(公告)日：2017-12-27
申请号：EP10152785.1
申请日：2010-02-05
IPC分类号： H01L27/12 , H01L21/77 , H01L29/04 , H01L29/423 , H01L29/786
CPC分类号： H01L27/1214 , H01L29/04 , H01L29/42384 , H01L29/78618
摘要： A display device includes a plurality of thin-film transistors formed on a substrate on which a display area is formed. At least one of the plurality of thin-film transistors includes a gate electrode, a gate insulating film formed to cover the gate electrode, an interlayer insulating film formed on an upper surface of the gate insulating film and having an opening formed in an area where the gate electrode is formed in plan view, a pair of heavily-doped semiconductor films arranged on an upper surface of the interlayer insulating film with the opening interposed therebetween, a polycrystalline semiconductor film formed across the opening and formed in the area, the polycrystalline semiconductor film being electrically connected to the pair of heavily-doped semiconductor films, and a pair of electrodes formed to overlap the pair of heavily-doped semiconductor films, respectively, without overlapping the polycrystalline semiconductor film.
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