公开(公告)号：EP1180494A2

公开(公告)日：2002-02-20

申请号：EP01306284.9

申请日：2001-07-20

申请人： Agere Systems Guardian Corporation

发明人： Chan, Edward ,  Kim, Jungsang ,  Huggins, Harold Alexis ,  Soh, Hyongsok

IPC分类号： B81B3/00 ,  H03H9/17

CPC分类号： H03H9/173 ,  B81B2201/0271 ,  B81C1/00142 ,  B81C2201/014 ,  H03H3/02 ,  H03H2003/021

摘要： A new bulk resonator may be fabricated by a process that is readily incorporated in the traditional fabrication techniques used in the fabrication of monolithic integrated circuits on a wafer. The resonator is decoupled from the wafer by a cavity etched under the resonator using selective etching through front openings (vias) in a resonator membrane. In a typical structure the resonator is formed over a silicon wafer by first forming a first electrode, coating a piezoelectric layer over both the electrode and the wafer surface and forming a second electrode opposite the first on the surface of the piezoelectric layer. After this structure is complete, a number of vias are etched in the piezoelectric layer exposing the surface under the piezoelectric layer to a selective etching process that selectively attacks the surface below the piezoelectric layer creating a cavity under the resonator.

公开(公告)号：EP1180494A3

公开(公告)日：2003-03-26

申请号：EP01306284.9

申请日：2001-07-20

申请人： Agere Systems Guardian Corporation

发明人： Chan, Edward ,  Kim, Jungsang ,  Huggins, Harold Alexis ,  Soh, Hyongsok

IPC分类号： B81B3/00 ,  H03H9/17 ,  H03H3/02

CPC分类号： H03H9/173 ,  B81B2201/0271 ,  B81C1/00142 ,  B81C2201/014 ,  H03H3/02 ,  H03H2003/021

摘要： A new bulk resonator may be fabricated by a process that is readily incorporated in the traditional fabrication techniques used in the fabrication of monolithic integrated circuits on a wafer. The resonator is decoupled from the wafer by a cavity etched under the resonator using selective etching through front openings (vias) in a resonator membrane. In a typical structure the resonator is formed over a silicon wafer by first forming a first electrode, coating a piezoelectric layer over both the electrode and the wafer surface and forming a second electrode opposite the first on the surface of the piezoelectric layer. After this structure is complete, a number of vias are etched in the piezoelectric layer exposing the surface under the piezoelectric layer to a selective etching process that selectively attacks the surface below the piezoelectric layer creating a cavity under the resonator.

摘要翻译： 新的体谐振器可以通过容易地结合在晶片上制造单片集成电路中的传统制造技术中的工艺来制造。 谐振器通过在共振器下蚀刻的腔体与晶片分离，使用通过谐振器膜中的前开口（通孔）的选择性蚀刻。 在典型的结构中，谐振器通过首先形成第一电极而在硅晶片上形成，在电极和晶片表面上涂覆压电层，并形成与压电层表面上的第一电极相对的第二电极。 在该结构完成之后，在将压电层下方的表面暴露的压电层中蚀刻多个通孔到选择性蚀刻工艺，该选择性蚀刻工艺选择性地攻击压电层下方的表面，在谐振器下面形成空腔。