公开(公告)号：EP3268305A1

公开(公告)日：2018-01-17

申请号：EP16711347.1

申请日：2016-03-07

Applicant: Murata Manufacturing Co., Ltd.

Inventor： LIUKKU, Matti ,  RUOHIO, Jaakko ,  VESTERINEN, Hannu

IPC: B81B3/00 ,  G01P15/125 ,  H01G5/14

CPC classification number: B81B3/0045 ,  B81B3/0056 ,  B81B3/0086 ,  B81B2201/0221 ,  B81B2201/0271 ,  G01P15/125 ,  G01P2015/0814 ,  H01G5/14

Abstract: A MEMS structure that provides an improved way to selectively control electromechanical properties of a MEMS device with an applied voltage. The MEMS structure includes a capacitor element that comprises at least one stator element, and at least one rotor element suspended for motion parallel to a first direction in relation to the stator element. The stator element and the rotor element form at least one capacitor element, the capacitance of which varies according to displacement of the rotor element from an initial position. The stator element and the rotor element are mutually oriented such that in at least one range of displacements of the rotor element from an initial position, the second derivative of the capacitance with respect to the displacement has negative values.

公开(公告)号：EP3169450A1

公开(公告)日：2017-05-24

申请号：EP15744805.1

申请日：2015-07-14

Applicant: Butterfly Network Inc.

Inventor： ROTHBERG, Jonathan M. ,  ALIE, Susan A. ,  FIFE, Keith G. ,  SANCHEZ, Nevada J. ,  RALSTON, Tyler S.

IPC: B06B1/02

CPC classification number: G01N29/2406 ,  A61B8/4483 ,  B06B1/0292 ,  B81B7/007 ,  B81B2201/0271 ,  B81C1/00238 ,  B81C1/00301 ,  B81C2201/019 ,  B81C2203/036 ,  B81C2203/0792 ,  H01L2224/4813 ,  H01L2924/0002 ,  H01L2924/146 ,  H01L2924/1461

Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.

Abstract translation: 描述了与互补金属氧化物半导体（CMOS）衬底集成的微机械超声换能器，以及制造这种器件的方法。 制造可能涉及两个独立的晶圆键合步骤。 晶片键合可用于在衬底中制造密封的空腔。 晶圆键合也可用于将衬底键合到另一衬底，例如CMOS晶圆。 至少第二晶片接合可以在低温下进行。

公开(公告)号：EP3132470A1

公开(公告)日：2017-02-22

申请号：EP15721395.0

申请日：2015-04-17

Applicant: Butterfly Network Inc.

Inventor： ROTHBERG, Jonathan, M. ,  FIFE, Keith, G. ,  SANCHEZ, Nevada, J. ,  ALIE, Susan, A.

IPC: H01L27/06 ,  H01L21/768 ,  B81C1/00 ,  A61B8/00 ,  A61B5/02 ,  B06B1/02 ,  H01L27/092

CPC classification number: H01L27/0617 ,  A61B8/00 ,  A61B8/4494 ,  B06B1/02 ,  B06B1/0292 ,  B06B2201/51 ,  B81B3/0021 ,  B81B7/0006 ,  B81B2201/0271 ,  B81C1/00158 ,  B81C1/00246 ,  B81C2203/0735 ,  B81C2203/0771 ,  H01L21/32134 ,  H01L21/56 ,  H01L21/768 ,  H01L21/76838 ,  H01L21/823871 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/0688 ,  H01L27/092 ,  H01L2224/16225

Abstract: Micromachined ultrasonic transducers formed in complementary metal oxide semiconductor (CMOS) wafers are described, as are methods of fabricating such devices. A metallization layer of a CMOS wafer may be removed by sacrificial release to create a cavity of an ultrasonic transducer. Remaining layers may form a membrane of the ultrasonic transducer.

Abstract translation: 还描述了形成在互补金属氧化物半导体（CMOS）晶片中的微加工超声换能器，以及制造这种器件的方法。 可以通过牺牲释放去除CMOS晶片的金属化层以产生超声换能器的空腔。 剩余的层可以形成超声换能器的膜。

公开(公告)号：EP2484008B1

公开(公告)日：2016-08-10

申请号：EP10821619.3

申请日：2010-09-27

Applicant: Teknologian tutkimuskeskus VTT Oy

Inventor： OJA, Aarne ,  PENSALA, Tuomas ,  MELTAUS, Johanna

IPC: H03H9/02 ,  H03H3/007 ,  H03H3/013 ,  H03H9/24 ,  H03H3/02 ,  H03H3/04 ,  B81B7/00 ,  B81B3/00

CPC classification number: H03H9/02259 ,  B81B3/0081 ,  B81B2201/0271 ,  H03H3/0076 ,  H03H9/02338 ,  H03H9/02448 ,  H03H9/2436 ,  H03H9/2452 ,  H03H9/2463 ,  H03H2003/027 ,  H03H2003/0407 ,  H03H2009/02496 ,  H03H2009/02503 ,  H03H2009/02511 ,  H03H2009/241 ,  H03H2009/2442

公开(公告)号：EP2193098B1

公开(公告)日：2015-11-18

申请号：EP08753588.6

申请日：2008-05-19

Applicant: Electronics and Telecommunications Research Institute

Inventor： YU, Han Young ,  KIM, Byung Hoon ,  KIM, An Soon ,  BAEK, In Bok ,  AH, Chil Seong ,  YANG, Jong Heon ,  PARK, Chan Woo ,  AHN, Chang Geun

IPC: H01J49/00 ,  H01J49/42 ,  B82B1/00 ,  B81B3/00 ,  G01N33/00 ,  H01L29/76 ,  H01L29/775 ,  H01L29/06 ,  B81B7/00

CPC classification number: H01J49/4205 ,  B81B7/0025 ,  B81B2201/0214 ,  B81B2201/0271 ,  B82Y10/00 ,  B82Y40/00 ,  G01N2291/0257 ,  H01J49/0018 ,  H01L29/0673 ,  H01L29/7613 ,  H01L29/775 ,  H03H2009/02314

公开(公告)号：EP2840060A1

公开(公告)日：2015-02-25

申请号：EP14181851.8

申请日：2014-08-21

Applicant: CANON KABUSHIKI KAISHA

Inventor： Torashima, Kazutoshi ,  Akiyama, Takahiro ,  Hasegawa, Kenji ,  Kato, Kazuhiko

IPC: B81C1/00 ,  B06B1/02

CPC classification number: A61B8/4494 ,  A61B5/0095 ,  B06B1/0292 ,  B81B2201/0271 ,  B81C1/00182 ,  H02N1/08

Abstract: A method for manufacturing a capacitive transducer is provided having a structure in which a vibrating film (29) is supported to be able to vibrate. The method includes forming a sacrificial layer (25) on a first electrode (23); forming a layer on the sacrificial layer, the layer forming at least part of the vibrating film; removing the sacrificial layer, including forming etching holes (31) to communicate with the sacrificial layer; forming a sealing layer (33) for sealing the etching holes; and etching at least part of the sealing layer. Before forming the sealing layer, an etching stop layer (30) is formed on the layer forming at least part of the vibrating film. In the step of etching at least part of the sealing layer, the sealing layer is removed until the etching stop layer is reached.

Abstract translation: 提供一种用于制造电容换能器的方法，其具有支撑振动膜（29）以能够振动的结构。 该方法包括在第一电极（23）上形成牺牲层（25）。 在所述牺牲层上形成层，所述层形成所述振动膜的至少一部分; 去除所述牺牲层，包括形成与所述牺牲层连通的蚀刻孔（31）; 形成用于密封蚀刻孔的密封层（33）; 并蚀刻至少一部分密封层。 在形成密封层之前，在形成振动膜的至少一部分的层上形成蚀刻停止层（30）。 在蚀刻至少部分密封层的步骤中，去除密封层，直到达到蚀刻停止层。

公开(公告)号：EP2193098A4

公开(公告)日：2014-05-07

申请号：EP08753588

申请日：2008-05-19

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： YU HAN YOUNG ,  KIM BYUNG HOON ,  KIM AN SOON ,  BAEK IN BOK ,  AH CHIL SEONG ,  YANG JONG HEON ,  PARK CHAN WOO ,  AHN CHANG GEUN

IPC: B82B1/00 ,  B81B3/00 ,  B82Y15/00 ,  B82Y40/00 ,  G01N33/00 ,  H01J49/00 ,  H01J49/42 ,  H01L29/06 ,  H01L29/76 ,  H01L29/775

CPC classification number: H01J49/4205 ,  B81B7/0025 ,  B81B2201/0214 ,  B81B2201/0271 ,  B82Y10/00 ,  B82Y40/00 ,  G01N2291/0257 ,  H01J49/0018 ,  H01L29/0673 ,  H01L29/7613 ,  H01L29/775 ,  H03H2009/02314

公开(公告)号：EP2617129A1

公开(公告)日：2013-07-24

申请号：EP11752575.8

申请日：2011-09-09

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Inventor： HENTZ, Sébastien ,  ANDREUCCI, Philippe ,  COLINET, Eric ,  DURAFFOURG, Laurent ,  LABARTHE, Sébastien

IPC: H03H9/02 ,  H03H9/24

CPC classification number: H02N2/18 ,  B81B3/0086 ,  B81B2201/0271 ,  B81B2203/0109 ,  H02N2/22 ,  H03H9/02259 ,  H03H9/2405 ,  H03H2009/0244 ,  H03H2009/02496 ,  Y10T29/42

Abstract: A device with a suspended beam and piezoresistive means of detecting displacement of the beam and a method of manufacturing the device are disclosed. The device comprises a support, a suspended beam, moving parallel to the plane of the support, and means of detecting displacement, comprising at least two piezoresistive strain gauges that are not in line with each other. The beam is suspended through detection means. The two gauges are located on two opposite lateral faces of the beam respectively.

公开(公告)号：EP2341030A3

公开(公告)日：2013-07-17

申请号：EP10171574.6

申请日：2010-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Baik, Chan-wook ,  Hong, Seog-woo ,  Suh, Hwan-soo

IPC: B81C1/00 ,  B81C99/00 ,  H01L23/66 ,  H01P11/00

CPC classification number: B81C1/00063 ,  B81B2201/0271 ,  B81C1/00619 ,  B81C2201/019 ,  H01J25/34 ,  H01L25/50 ,  H01L2924/0002 ,  H01P11/003 ,  H01L2924/00

Abstract: Provided is a microelectromechanical system (MEMS) that includes a first structure 100 and second structure 200. The first structure and second structure may each include a first substrate 110 and a second substrate 120. The first substrate of each structure may have first and second surfaces that face each other. The first substrate may include a via etching hole pattern penetrating the first surface and the second surface and a first non-via etching hole pattern penetrating the first surface. The second substrate 120 of each structure may have third and fourth surfaces that face each other. The second substrate may include a second non-via etching hole pattern penetrating the third surface in a position corresponding to the via etching hole pattern of the first substrate. In the microelectromechanical system (MEMS) the second surface of the first substrate and the third surface of the second substrate may be bonded together.

公开(公告)号：EP2417645A1

公开(公告)日：2012-02-15

申请号：EP10717189.4

申请日：2010-04-09

Applicant: Centre National de la Recherche Scientifique

Inventor： FAUCHER, Marc ,  THERON, Didier ,  GAQUIERE, Christophe

IPC: H01L41/09 ,  B81B3/00 ,  G01L9/00

CPC classification number: G01L9/0098 ,  B81B3/0086 ,  B81B2201/0271 ,  B81B2203/0118 ,  B81B2203/04 ,  G01L1/005 ,  H01L27/20 ,  H03H3/0073 ,  H03H9/02259 ,  H03H9/02409 ,  H03H2009/02511

Abstract: Microelectromechanical device comprising: a substrate (SS); a first layer (Ci) of a piezoelectric material, deposited on a surface of said substrate; a second layer (C2) of a semiconductor material, deposited on said first layer; at least one suspended element (ES), formed by extensions of said layers that extend beyond an edge (B) of said substrate; and a field-effect transistor (FET) integrated into said second layer and into its extension, having at least one channel that extends at least partly within said suspended element, comprising electrodes (D, S1, G) connected to conductive tracks (PCD) that extend on top of said second layer and at least one of which passes underneath said edge of the substrate; characterized in that at least two conductive tracks connected to two respective electrodes of the field-effect transistor overlap, without electric contact between them, so as to form a three-dimensional interconnection structure.

Abstract translation: 微机电装置包括：基板（SS）; 沉积在所述衬底的表面上的压电材料的第一层（Ci）; 沉积在所述第一层上的半导体材料的第二层（C2）; 至少一个悬挂元件（ES），由所述层的延伸部分延伸超出所述衬底的边缘（B）形成; 以及集成到所述第二层中并进入其延伸部的场效应晶体管（FET），其具有至少部分地在所述悬置元件内延伸的至少一个通道，包括连接到导电轨迹（PCD）的电极（D，S1，G） 其延伸在所述第二层的顶部，并且其中的至少一个通过所述衬底的所述边缘下方; 其特征在于，连接到所述场效应晶体管的两个相应电极的至少两个导电迹线重叠，在它们之间没有电接触，以便形成三维互连结构。