专利检索 ap:("Analog Devices, Inc.") AND inv:"BAGINSKI, Paul A." 第 1 页

1.

发明授权
ARCHITECTURE COMBINING A CONTINUOUS-TIME STAGE WITH A SWITCHED-CAPACITOR STAGE FOR DIGITAL-TO-ANALOG CONVERTERS AND LOW-PASS FILTERS 有权
标题翻译：架构一时间与连续状态状态闰电容数字模拟转换器和低通组合

公开(公告)号：EP1966894B1

公开(公告)日：2010-02-10

申请号：EP06848190.2

申请日：2006-12-27

申请人： Analog Devices, Inc.

发明人： BAGINSKI, Paul A. , ADAMS, Robert , NGUYEN, Khiem

IPC分类号： H03H19/00 , H03M3/00 , H03M7/00

CPC分类号： H03M3/502 , H03H19/004

2.

发明公开
ARCHITECTURE COMBINING A CONTINUOUS-TIME STAGE WITH A SWITCHED-CAPACITOR STAGE FOR DIGITAL-TO-ANALOG CONVERTERS AND LOW-PASS FILTERS 有权
标题翻译：架构一时间与连续状态状态闰电容数字模拟转换器和低通组合

公开(公告)号：EP1966894A2

公开(公告)日：2008-09-10

申请号：EP06848190.2

申请日：2006-12-27

申请人： Analog Devices, Inc.

发明人： BAGINSKI, Paul A. , ADAMS, Robert , NGUYEN, Khiem

IPC分类号： H03M3/00 , H03H17/02 , H03H17/06

CPC分类号： H03M3/502 , H03H19/004

摘要： A digital to analog converter (DAC) includes a first continuous-time stage that receives an input signal associated with a digital signal and performs continuous-time digital-to-analog conversion operations on the input signal. The first continuous-time stage outputs a first output signal. A second switched-capacitor stage receives the first output signal and performs switched-capacitor filtering of the first output signal. The second switched-capacitor stage outputs a second output signal that is sent to a low pass filter to form a continuous analog signal associated with the digital signal.