公开(公告)号：EP3478166A1

公开(公告)日：2019-05-08

申请号：EP17821210.6

申请日：2017-06-29

申请人： Analog Devices, Inc.

发明人： DEMIRTAS, Sefa ,  KING, Jason D. ,  ADAMS, Robert ,  AKL, Tony Joseph ,  BERNSTEIN, Jeffrey G.

IPC分类号： A61B5/02

公开(公告)号：EP2926459B1

公开(公告)日：2018-03-14

申请号：EP13859273.8

申请日：2013-11-20

申请人： Analog Devices, Inc.

发明人： NGUYEN, Khiem, Quang ,  ADAMS, Robert

IPC分类号： H03M1/06 ,  H03M1/74

CPC分类号： H03M1/66 ,  H03M1/0668 ,  H03M1/067 ,  H03M1/74 ,  H03M3/464

摘要： A multi-bit digital to analog converter comprising a plurality of unit cells, each providing an electrical signal to a common output at multiple levels in response to a respective control signal and a control system having multiple layers of branch circuits. Each branch circuit comprises a dynamic element matching circuit receiving a plurality of least significant bits of an input code to generate respective output signals to the control system and a plurality of branches, each receiving most significant bits of an input code to the respective layer and having an adder for the most significant bits of the layer's input signal and a respective output from the dynamic element matching circuit. An input signal to the digital to analog converter is input to a first layer as that layer's input code, input codes of the other layers are taken from output signals of preceding layers, and output signals of a last layer may be input to the unit cells as control signals.

公开(公告)号：EP3190709A1

公开(公告)日：2017-07-12

申请号：EP17157464.3

申请日：2013-11-20

申请人： Analog Devices, Inc.

发明人： NGUYEN, Khiem Quang ,  ADAMS, Robert

IPC分类号： H03M1/06 ,  H03M1/74

CPC分类号： H03M1/66 ,  H03M1/0668 ,  H03M1/067 ,  H03M1/74 ,  H03M3/464

摘要： A multi-bit digital to analog converter comprising a plurality of unit cells, each providing an electrical signal to a common output at multiple levels in response to a respective control signal and a control system having multiple layers of branch circuits. Each branch circuit comprises a dynamic element matching circuit receiving a plurality of least significant bits of an input code to generate respective output signals to the control system and a plurality of branches, each receiving most significant bits of an input code to the respective layer and having an adder for the most significant bits of the layer's input signal and a respective output from the dynamic element matching circuit. An input signal to the digital to analog converter is input to a first layer as that layer's input code, input codes of the other layers are taken from output signals of preceding layers, and output signals of a last layer may be input to the unit cells as control signals.

摘要翻译： 一种多位数模转换器，包括多个单位单元，每个单位单元响应于相应的控制信号向多个级别的公共输出提供电信号，以及具有多层分支电路的控制系统。 每个分支电路包括动态元件匹配电路，该动态元件匹配电路接收输入码的多个最低有效位以产生到控制系统的相应输出信号和多个分支，每个分支接收输入码的最高有效位到相应层并且具有 用于层的输入信号的最高有效位的加法器和来自动态元件匹配电路的相应输出。 数模转换器的输入信号作为该层的输入代码被输入到第一层，其他层的输入代码从前一层的输出信号中获取，并且最后一层的输出信号可以被输入到单位单元 作为控制信号。

公开(公告)号：EP2304968A2

公开(公告)日：2011-04-06

申请号：EP09751662.9

申请日：2009-05-22

申请人： Analog Devices, Inc.

发明人： HAILA, Olli ,  HARNEY, Kieran ,  ELKO, Gary, W. ,  ADAMS, Robert

IPC分类号： H04R3/00

CPC分类号： H04R17/02 ,  H04R1/406 ,  H04R3/005 ,  H04R19/005 ,  H04R2430/00 ,  H04R2499/11

摘要： A microphone system has an output and at least a first transducer with a first dynamic range, a second transducer with a second dynamic range different than the first dynamic range, and coupling system to selectively couple the output of one of the first transducer or the second transducer to the system output, depending on the magnitude of the input sound signal, to produce a system with a dynamic range greater than the dynamic range of either individual transducer. A method of operating a microphone system includes detecting whether a transducer output crosses a threshold, and if so then selectively coupling another transducer's output to the system output. The threshold may change as a function of which transducer is coupled to the system output. The system and methods may also combine the outputs of more than one transducer in a weighted sum during transition from one transducer output to another, as a function of time or as a function of the amplitude of the incident audio signal. Methods of operating the system may include equalizing the outputs of two or more transducers prior to coupling one or more outputs to the system output.

公开(公告)号：EP2926459A1

公开(公告)日：2015-10-07

申请号：EP13859273.8

申请日：2013-11-20

申请人： Analog Devices, Inc.

发明人： NGUYEN, Khiem, Quang ,  ADAMS, Robert

IPC分类号： H03M1/66

CPC分类号： H03M1/66 ,  H03M1/0668 ,  H03M1/067 ,  H03M1/74 ,  H03M3/464

摘要： A method and circuit to perform noise shaped splitting of a digital input signal may include using multiple layers to process the input signal. In the first layer, the most significant bits of the input signal may be distributed to a plurality of branches. Dynamic element matching may be performed using the least significant bits of the input signal. Based on the results of the dynamic element matching, values may be added to the plurality of branches. If there is insufficient data activity, dynamics enhancement may be performed to increase the data activity. The output signals of each of the plurality of branches in the first layer may be provided to a second layer, in which these steps can be repeated on each of the output signals. The outputs of the second layer may be provided to a plurality of three level unit elements.

摘要翻译： 执行数字输入信号的噪声分割的方法和电路可以包括使用多个层来处理输入信号。 在第一层中，输入信号的最高有效位可以被分配到多个分支。 可以使用输入信号的最低有效位来执行动态元素匹配。 基于动态元素匹配的结果，可以将值添加到多个分支。 如果数据活动不足，可能会进行动态增强以增加数据活动。 可以将第一层中的多个分支中的每一个的输出信号提供给第二层，其中可以对每个输出信号重复这些步骤。 第二层的输出可以被提供给多个三级单元元件。

公开(公告)号：EP1966894B1

公开(公告)日：2010-02-10

申请号：EP06848190.2

申请日：2006-12-27

申请人： Analog Devices, Inc.

发明人： BAGINSKI, Paul A. ,  ADAMS, Robert ,  NGUYEN, Khiem

IPC分类号： H03H19/00 ,  H03M3/00 ,  H03M7/00

CPC分类号： H03M3/502 ,  H03H19/004

公开(公告)号：EP1966894A2

公开(公告)日：2008-09-10

申请号：EP06848190.2

申请日：2006-12-27

申请人： Analog Devices, Inc.

发明人： BAGINSKI, Paul A. ,  ADAMS, Robert ,  NGUYEN, Khiem

IPC分类号： H03M3/00 ,  H03H17/02 ,  H03H17/06

CPC分类号： H03M3/502 ,  H03H19/004

摘要： A digital to analog converter (DAC) includes a first continuous-time stage that receives an input signal associated with a digital signal and performs continuous-time digital-to-analog conversion operations on the input signal. The first continuous-time stage outputs a first output signal. A second switched-capacitor stage receives the first output signal and performs switched-capacitor filtering of the first output signal. The second switched-capacitor stage outputs a second output signal that is sent to a low pass filter to form a continuous analog signal associated with the digital signal.