公开(公告)号：EP3151279A4

公开(公告)日：2018-02-14

申请号：EP14861123

申请日：2014-10-01

申请人： BOE TECHNOLOGY GROUP CO LTD

发明人： SUN SHUANG ,  CHOI SEUNGJIN ,  NIU JING ,  ZHANG FANGZHEN

IPC分类号： H01L27/12 ,  G02F1/1362 ,  H01L21/77

CPC分类号： H01L27/1288 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2001/13625 ,  G02F2001/136295 ,  H01L21/77 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L27/32 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78642 ,  H01L29/7869 ,  H01L29/78696

摘要： An array substrate and manufacturing method thereof and a display device. The display device includes a pixel electrode (8), including a portion (a) in a display region and a portion (b) in a non-display region; a first electrode (6) formed on the non-display region (b) of the pixel electrode (8); a passivation layer (9) formed on the pixel electrode (8) and the first electrode (6), which includes a via hole (11) located over the first electrode (6); an active layer (4) and a second electrode (7) that are formed on the passivation layer (9), the active layer (4) being connected to the first electrode (6) through the via hole (11) of the passivation layer (9). With the array substrate and the manufacturing method thereof, the manufacturing cost is reduced, the corrosion to an electrode material is lessened, and quality of the array substrate is enhanced.

公开(公告)号：EP3232262A4

公开(公告)日：2018-07-04

申请号：EP15793662

申请日：2015-05-22

申请人： BOE TECHNOLOGY GROUP CO LTD

发明人： LV ZHIJUN ,  LI TAILIANG ,  GAO TAO ,  NING CE ,  SUN SHUANG

IPC分类号： G02F1/1362 ,  G02F1/1335

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  G02F1/133553 ,  G02F1/13439 ,  G02F1/1362 ,  G02F1/136227 ,  G02F2201/123 ,  G02F2203/02 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908

摘要： The present disclosure discloses an array substrate, comprising a substrate, a plurality of pixel regions on the substrate, and a thin-film transistor formed in each of the pixel regions, each of the pixel regions comprising a pixel electrode region, wherein, the thin-film transistor comprises a gate layer and a source/drain layer formed laminatedly on the substrate; the array substrate further comprises a flat layer and a reflective metal layer formed in sequence on the substrate and covering at least the pixel electrode region and the thin-film transistor; the reflective metal layer is electrically connected to a drain of the thin-film transistor; and at least one of the gate layer and the source/drain layer is formed of a single metal layer. The present disclosure further provides a method for manufacturing the array substrate and a totally reflective type liquid crystal display comprising the array substrate.

公开(公告)号：EP3200230A4

公开(公告)日：2018-06-06

申请号：EP15763182

申请日：2015-02-27

申请人： BOE TECHNOLOGY GROUP CO LTD

发明人： SUN SHUANG ,  ZHANG FANGZHEN ,  NIU JING ,  LV ZHIJUN

IPC分类号： H01L29/786 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

CPC分类号： H01L29/78675 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/78633 ,  H01L29/78696

摘要： The present disclosure discloses a thin film transistor assembly, an array substrate and a method of manufacturing the same, and a display device including the array substrate. The array substrate includes a substrate; a plurality of thin film transistors formed on the substrate; and a plurality of light shielding layers, each of the light shielding layers being arranged between a source electrode and a drain electrode of the thin film transistor and configured to block light from the exterior from illuminating an active layer of the thin film transistor. The light shielding layer and the source electrode and the drain electrode of the thin film transistor are formed in the same layer on the substrate. As the light shielding layer, the source electrode and the drain electrode of the thin film transistor and a data line may be formed on the substrate by using the same material layer through a single patterning process, times of performing patterning processes and the number of masks used may be reduced and thus manufacturing process and cost of the array substrate may be decreased.