公开(公告)号：EP2338170B8

公开(公告)日：2015-08-05

申请号：EP09785641.3

申请日：2009-09-14

申请人： Cambridge Silicon Radio Limited

发明人： HOLLAND, Andrew

IPC分类号： H01L23/31 ,  H01L23/485 ,  H01L23/525 ,  H01L21/60 ,  H01L21/78 ,  H01L23/00

CPC分类号： H01L24/94 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/02 ,  H01L24/12 ,  H01L24/17 ,  H01L2224/02351 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014

摘要： An improved wafer level chip scale packaging technique is described which does not use an encapsulated via to connect between a redirection layer and a pad within the pad ring on the semiconductor die. In an embodiment, a first dielectric layer is formed such that it terminates on each die within the die's pad ring. Tracks are then formed in a conductive layer which contact one of the pads and run over the edge of an opening onto the surface of the first dielectric layer. These tracks may be used to form an electrical connection between the pad and a solder ball.

公开(公告)号：EP2338170B1

公开(公告)日：2015-06-17

申请号：EP09785641.3

申请日：2009-09-14

申请人： Cambridge Silicon Radio Limited

发明人： HOLLAND, Andrew

IPC分类号： H01L23/31 ,  H01L23/485 ,  H01L23/525 ,  H01L21/60 ,  H01L21/78 ,  H01L23/00

CPC分类号： H01L24/94 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/02 ,  H01L24/12 ,  H01L24/17 ,  H01L2224/02351 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014

摘要： An improved wafer level chip scale packaging technique is described which does not use an encapsulated via to connect between a redirection layer and a pad within the pad ring on the semiconductor die. In an embodiment, a first dielectric layer is formed such that it terminates on each die within the die's pad ring. Tracks are then formed in a conductive layer which contact one of the pads and run over the edge of an opening onto the surface of the first dielectric layer. These tracks may be used to form an electrical connection between the pad and a solder ball.

公开(公告)号：EP2338170A1

公开(公告)日：2011-06-29

申请号：EP09785641.3

申请日：2009-09-14

申请人： Cambridge Silicon Radio Limited

发明人： HOLLAND, Andrew

IPC分类号： H01L23/31 ,  H01L23/485 ,  H01L23/525 ,  H01L21/60

CPC分类号： H01L24/94 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/02 ,  H01L24/12 ,  H01L24/17 ,  H01L2224/02351 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014

摘要： An improved wafer level chip scale packaging technique is described which does not use an encapsulated via to connect between a redirection layer and a pad within the pad ring on the semiconductor die. In an embodiment, a first dielectric layer is formed such that it terminates on each die within the die's pad ring. Tracks are then formed in a conductive layer which contact one of the pads and run over the edge of an opening onto the surface of the first dielectric layer. These tracks may be used to form an electrical connection between the pad and a solder ball.