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    SILICON CARBIDE DEVICES AND FABRICATING METHODS THEREFOR
    4.
    发明公开
    SILICON CARBIDE DEVICES AND FABRICATING METHODS THEREFOR 有权
    圣地亚哥州立大学

    公开(公告)号：EP1759418A1

    公开(公告)日：2007-03-07

    申请号：EP05732917.9

    申请日：2005-03-30

    申请人： CREE, INC.

    发明人： DAS, Mrinal Kanti ,  RYU, Sei-Hyung

    IPC分类号： H01L29/78 ,  H01L29/739 ,  H01L21/336 ,  H01L21/331 ,  H01L29/10

    CPC分类号： H01L29/7802 ,  H01L29/0615 ,  H01L29/0661 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395 ,  Y10S438/931

    摘要： MOS channel devices and methods of fabricating such devices having a hybrid channel are provided. Exemplary devices include vertical power MOSFETs that include a hybrid well region of silicon carbide and methods of fabricating such devices are provided. The hybrid well region may include an implanted p-type silicon carbide well portion in a p-type silicon carbide epitaxial layer, an implanted p-type silicon carbide contact portion that contacts the implanted p-type silicon carbide well portion and extends to a surface of the p-type epitaxial layer and/or an epitaxial p-type silicon carbide portion, at least a portion of the epitaxial p-type silicon carbide well portion corresponding to a p-type channel region of the MOSFET.

    摘要翻译： 提供了MOS通道器件和制造具有混合通道的器件的方法。 示例性器件包括垂直功率MOSFET，其包括碳化硅的混合阱区域以及制造这种器件的方法。 混合阱区可以包括在p型碳化硅外延层中注入的p型碳化硅阱部分，注入的p型碳化硅接触部分，其与注入的p型碳化硅阱部分接触并延伸到表面 的p型外延层和/或外延p型碳化硅部分，所述外延p型碳化硅阱部分的至少一部分对应于所述MOSFET的p型沟道区。

    SILICON CARBIDE SWITCHING DEVICES INCLUDING P-TYPE CHANNELS AND METHODS OF FORMING THE SAME
    6.
    发明公开
    SILICON CARBIDE SWITCHING DEVICES INCLUDING P-TYPE CHANNELS AND METHODS OF FORMING THE SAME 有权
    包括P型沟道的碳化硅开关器件及其形成方法

    公开(公告)号：EP2033212A2

    公开(公告)日：2009-03-11

    申请号：EP07776308.4

    申请日：2007-04-26

    申请人： CREE, INC.

    发明人： DAS, Mrinal Kanti ,  ZHANG, Qingchun ,  RYU, Sei-Hyung

    IPC分类号： H01L21/18 ,  H01L21/324 ,  H01L29/24 ,  H01L21/28

    CPC分类号： H01L21/324 ,  H01L21/046 ,  H01L21/049 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395 ,  H01L29/7838 ,  Y10S438/931

    摘要： Methods of forming a p-channel MOS device in silicon carbide include forming an n-type well in a silicon carbide layer, and implanting p-type dopant ions to form a p-type region in the n-type well at a surface of the silicon carbide layer and at least partially defining a channel region in the n-type well adjacent the p-type region. A threshold adjustment region is formed in the channel region. The implanted ions are annealed in an inert atmosphere at a temperature greater than 1650°C. A gate oxide layer is formed on the channel region, and a gate is formed on the gate oxide layer. A silicon carbide-based transistor includes a silicon carbide layer, an n-type well in the silicon carbide layer, and a p-type region in the n-type well at a surface of the silicon carbide layer and at least partially defining a channel region in the n-type well adjacent the p-type region. A threshold adjustment region is in the channel region and includes p-type dopants at a dopant concentration of about 1 x 1016 cm-3 to about 5 x 1018 cm-3. The transistor further includes a gate oxide layer on the channel region, and a gate on the gate oxide layer. The transistor may exhibit a hole mobility in the channel region in excess of 5 cm2/V-s at a gate voltage of -25V.

    摘要翻译： 在碳化硅中形成p沟道MOS器件的方法包括在碳化硅层中形成n型阱，并且在n型阱的表面处注入p型掺杂剂离子以在n型阱中形成p型区域 碳化硅层并且在与p型区域相邻的n型阱中至少部分地限定沟道区域。 阈值调整区域形成在沟道区域中。 注入的离子在惰性气氛中在高于1650℃的温度下退火。 在沟道区上形成栅极氧化层，在栅极氧化层上形成栅极。 基于碳化硅的晶体管包括碳化硅层，碳化硅层中的n型阱和位于碳化硅层表面处的n型阱中的p型区域，并且至少部分地限定沟道 在与p型区域相邻的n型阱中。 阈值调节区域在沟道区域中并且包括掺杂剂浓度为约1×1016cm-3至约5×1018cm-3的p型掺杂剂。 该晶体管还包括沟道区上的栅极氧化物层和栅极氧化物层上的栅极。 在-25V的栅极电压下，晶体管可以在沟道区中表现出超过5cm 2 / V-s的空穴迁移率。