公开(公告)号：EP2307895A2

公开(公告)日：2011-04-13

申请号：EP09757872.8

申请日：2009-06-03

Applicant: Eles Semiconductor Equipment S.P.A.

Inventor： DI LELLO, Stefano

IPC: G01R31/319 ,  G01R31/28

CPC classification number: G01R31/2891 ,  G01R1/0483 ,  G01R3/00 ,  H05K3/326 ,  H05K3/4007 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2201/10204 ,  H05K2201/10393 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2203/0108 ,  H05K2203/162

Abstract: A test board (115;115') is proposed for testing electronic devices (105;105'), each one of them having a plurality of terminals (220;220') for electrically contacting the electronic device. The test board includes a support substrate (205;205!). A set of banks of electrically conductive receptacles (210;210') are arranged on the substrate each one for resting a corresponding electronic device; each receptacle (250,255;250',255') is adapted to receive a terminal of the corresponding electronic device. Locking means (225) are further arranged on the substrate for mechanically locking the electronic devices on the test board. The test board further includes assembly means (230-245) for mounting the locking means on the substrate independently of the receptacles.

公开(公告)号：EP2307895B1

公开(公告)日：2012-03-14

申请号：EP09757872.8

申请日：2009-06-03

Applicant: Eles Semiconductor Equipment S.P.A.

Inventor： DI LELLO, Stefano

IPC: G01R31/319 ,  G01R31/28 ,  H05K3/32 ,  H05K3/40 ,  H05K3/00

CPC classification number: G01R31/2891 ,  G01R1/0483 ,  G01R3/00 ,  H05K3/326 ,  H05K3/4007 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2201/10204 ,  H05K2201/10393 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2203/0108 ,  H05K2203/162

Abstract: A test board (115;115') is proposed for testing electronic devices (105;105'), each one of them having a plurality of terminals (220;220') for electrically contacting the electronic device. The test board includes a support substrate (205;205'). A set of banks of electrically conductive receptacles (210;210') are arranged on the substrate each one for resting a corresponding electronic device; each receptacle (250,255;250',255') is adapted to receive a terminal of the corresponding electronic device. Locking means (225) are further arranged on the substrate for mechanically locking the electronic devices on the test board. The test board further includes assembly means (230-245) for mounting the locking means on the substrate independently of the receptacles.

公开(公告)号：EP2122377A1

公开(公告)日：2009-11-25

申请号：EP08708988.4

申请日：2008-02-14

Applicant: Eles Semiconductor Equipment S.P.A.

Inventor： DI LELLO, Stefano

IPC: G01R31/28

CPC classification number: G01R31/2889

Abstract: A cartridge (125) is proposed for testing integrated circuits on a wafer (115) with the wafer that has a wafer front surface with a plurality of terminals of the integrated circuits. The cartridge includes a probe card (120), which has a card front surface with a plurality of probes (210) for contacting the terminals of the integrated circuits electrically, and a card back surface opposite the card front surface. Locking means (215,213,245,255) is provided for locking the wafer on the probe card. The locking means includes one or more through-holes (213) that cross the probe card from the card front surface to the card back surface; sealing means (215) is arranged on the card front surface around the probes (210) and the through-holes (213. In this way, a substantially airtight chamber (225) is defined by the probe card, the sealing means and the wafer (115) -when the wafer front surface abuts against the sealing means. Coupling means (213,245,255) is arranged on the card back surface. The coupling means is used to couple the cartridge with pneumatic means for creating a depression in the chamber, by removingair from the chamber through the through-holes; the same coupling means is also used to seal the airtight chamber when the cartridge is decoupled from the pneumatic means.