公开(公告)号：EP1797748B1

公开(公告)日：2017-05-17

申请号：EP05802576.8

申请日：2005-09-29

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Inventor： DAVOINE, Cécile ,  FENDLER, Manuel

IPC: H05K3/34

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L24/83 ,  H01L24/90 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/114 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/116 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29111 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/83894 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01067 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H05K3/321 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2201/10977 ,  H05K2203/0278 ,  Y10T29/49126 ,  H01L2224/13099 ,  H01L2924/01082 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

公开(公告)号：EP1926136B1

公开(公告)日：2017-01-11

申请号：EP07022679.0

申请日：2007-11-22

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Murayama, Kei ,  Taguchi, Yuichi ,  Shiraishi, Akinori ,  Sunohara, Masahiro ,  Higashi, Mitsutoshi

IPC: H01L23/02 ,  H01L25/00 ,  H01L33/48 ,  H05K3/40 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L21/48 ,  H01L23/538 ,  H01L25/16 ,  H05K3/46

CPC classification number: H01L23/147 ,  H01L21/4846 ,  H01L23/02 ,  H01L23/13 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5384 ,  H01L23/5385 ,  H01L25/162 ,  H01L25/167 ,  H01L25/50 ,  H01L33/486 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1461 ,  H05K3/4015 ,  H05K3/4614 ,  H05K2201/0367 ,  H05K2201/096 ,  H05K2203/049 ,  H05K2203/0733 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method of manufacturing an electronic component includes the steps of: a) forming a plurality of wiring boards (100, 200; 300) that include first through holes (101A, 20 1 A; 301 A) penetrating through a semiconductor substrate and conductive material (104, 204; 305) buried in the first through holes; b) providing conductive projections (107; 310) on the conductive material of any of the plurality of wiring boards; and c) bonding the plurality of wiring boards to each other and electrically connecting the conductive material of the respective wiring boards by the projections.

Abstract translation: 一种制造电子部件的方法包括以下步骤：a）形成多个布线板（100,200,300），所述多个布线板包括贯穿半导体基板的第一通孔（101A，20A 1A; 301A）和导电材料 （104,204; 305），其被埋在所述第一通孔中; b）在多个布线板中的任一个的导电材料上设置导电突起（107; 310）; 以及c）将所述多个布线板彼此接合并通过所述突起电连接各个布线板的导电材料。

公开(公告)号：EP3054751A2

公开(公告)日：2016-08-10

申请号：EP16154596.7

申请日：2016-02-08

Applicant: JX Nippon Mining & Metals Corporation

Inventor： KOHIKI, Michiya

IPC: H05K3/02

CPC classification number: H05K1/09 ,  C23C18/1653 ,  C25D1/04 ,  C25D3/04 ,  C25D3/18 ,  C25D3/38 ,  C25D3/562 ,  C25D5/14 ,  C25D7/0614 ,  H05K3/0058 ,  H05K3/025 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/421 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/09509 ,  H05K2203/0152 ,  H05K2203/0156 ,  H05K2203/0307 ,  H05K2203/0723 ,  H05K2203/0726

Abstract: Provided is a copper foil provided with a carrier in which the laser hole-opening properties of the ultrathin copper layer are good and which is suitable for producing a high-density integrated circuit substrate. A copper foil provided with a carrier having, in order, a carrier, an intermediate layer, and an ultrathin copper layer, wherein the specular gloss at 60° in an MD direction of the intermediate layer side surface of the ultrathin copper layer is 140 or less.

Abstract translation: 本发明提供一种具有载体的铜箔，其中，超薄铜层的激光开孔性良好，适于制造高密度集成电路基板。 1.一种铜箔，其特征在于，其具有依次具有载体，中间层和超薄铜层的载体，其特征在于，超薄铜层的中间层侧表面在MD方向上60°的镜面光泽度为140或 减。

公开(公告)号：EP2904884A4

公开(公告)日：2016-08-03

申请号：EP13843200

申请日：2013-10-04

Applicant: LG INNOTEK CO LTD

Inventor： LEE SANG MYUNG ,  KIM BYEONG HO ,  PARK JAE SEOK ,  SEO YEONG UK ,  SEO HYUN SEOK ,  YOO CHANG WOO ,  LEE KYU WON

IPC: H05K3/46 ,  H05K1/02

CPC classification number: H05K1/0346 ,  H05K1/0298 ,  H05K1/0366 ,  H05K1/0373 ,  H05K1/115 ,  H05K1/119 ,  H05K3/0032 ,  H05K3/107 ,  H05K3/4007 ,  H05K3/465 ,  H05K2201/0367 ,  H05K2201/096 ,  H05K2203/041

公开(公告)号：EP2293324A4

公开(公告)日：2014-09-10

申请号：EP09769870

申请日：2009-06-18

Applicant: PANASONIC CORP

Inventor： SASAOKA TATSUO ,  TOYODA KAORI ,  NISHIWAKI KENTARO ,  IKEUCHI HIROKI ,  NASU HIROSHI

IPC: H01L21/60 ,  H01B1/22 ,  H01L21/52 ,  H01L21/56 ,  H01L23/00 ,  H01L31/024 ,  H01L33/00 ,  H01L33/62 ,  H01L33/64 ,  H05K3/32 ,  H05K3/40

CPC classification number: H01L33/62 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/025 ,  H01L21/563 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L31/024 ,  H01L33/641 ,  H01L33/647 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/16225 ,  H01L2224/29076 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/8314 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83207 ,  H01L2224/83385 ,  H01L2224/838 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/351 ,  H05K3/321 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/10106 ,  H05K2201/10166 ,  H05K2201/2036 ,  H05K2203/1131 ,  H05K2203/1178 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01014 ,  H01L2224/29298 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2924/00014

Abstract: A mounting structure is provided that can allow gaseous matter generated when performing a heat treatment to escape to outside efficiently. A mounting structure 10 includes a substrate 1 having electrodes 2a and 2b, an electronic component 3 having electrodes 21a and 21b, joints 15a and 15b that electrically connect the electrodes 2a and 2b of the substrate 1 and the electrodes 21a and 21b of the electronic component 3 and also fix the electronic component 3 to the surface of the substrate 1, and a convex portion 4 that abuts against the electrode 2a of the substrate 1 and the electrode 21 a of the electronic component 3 and is used as a spacer.

公开(公告)号：EP2161976B1

公开(公告)日：2013-09-25

申请号：EP07721472.4

申请日：2007-06-15

Applicant: Princo Corp.

Inventor： YANG, Chih-kuang ,  HSING, Chieh-Lin

IPC: H05K3/34

CPC classification number: H05K3/4007 ,  H05K3/107 ,  H05K3/20 ,  H05K3/243 ,  H05K3/3452 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/099

公开(公告)号：EP1921904B1

公开(公告)日：2013-06-12

申请号：EP06766615.6

申请日：2006-06-13

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： MATSUBARA, Daigo ,  CHIKAGAWA, Osamu

IPC: H05K3/46 ,  H01L23/13

CPC classification number: H05K3/4007 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0306 ,  H05K1/113 ,  H05K1/115 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/0367 ,  H05K2201/0979 ,  H05K2203/308 ,  Y10T29/49163 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A ceramic electronic component is provided which can realize a sufficient drop resistance strength even when terminal electrodes are formed at a higher density. A ceramic electronic component 10 of the present invention has a ceramic laminate 11 composed of ceramic laminates 11A which are laminated to each other, first terminal electrodes 13 disposed in a peripheral portion of a bottom surface of the ceramic laminate 11, catch pad electrodes 15A provided in the ceramic laminate 11 to face the respective first terminal electrodes 13, and sets each including at least two first via hole conductors 16A and 16B, which electrically connect the first terminal electrodes 13 and the respective catch pad electrodes 15A.

公开(公告)号：EP2555236A1

公开(公告)日：2013-02-06

申请号：EP11762551.7

申请日：2011-03-11

Applicant: Furukawa Electric Co., Ltd. ,  Furukawa Automotive Systems Inc.

Inventor： ISHIDA, Yoshiyuki ,  MATUSHIMA, Sadao ,  FUKUCHI, Toshihide

IPC: H01L23/12

CPC classification number: H01L23/66 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/552 ,  H01L23/642 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2924/0002 ,  H05K1/0216 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0251 ,  H05K1/115 ,  H05K2201/0187 ,  H05K2201/0367 ,  H05K2201/093 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2201/09854 ,  H05K2201/10098 ,  H01L2924/00

Abstract: A high-frequency circuit board capable of easily forming a bias line whose resonance frequency is sufficiently separated from operating frequency is provided. On a high-frequency circuit board 100, by electrically connecting a bias line 11 to a high-frequency circuit 10 using blind via holes 106 and 107, it is possible to limit the route that has a possibility of producing resonance only to the bias line connecting the ends 106a and 107a of the blind via holes 106 and 107 to the bias line 11. By adjusting the route length from the end 106a to the end 107a, it is possible to prevent production of resonance in the vicinity of the operating frequency.

Abstract translation: 提供了能够容易地形成谐振频率与工作频率充分分离的偏置线的高频电路基板。 在高频电路板100上，通过使用盲通孔106和107将偏置线11与高频电路10进行电连接，可以限制具有产生谐振的可能性的路径到偏置线 将盲孔106和107的端部106a和107a连接到偏置线11.通过调整从端部106a到端部107a的路线长度，可以防止在工作频率附近产生谐振。

公开(公告)号：EP2493274A1

公开(公告)日：2012-08-29

申请号：EP10824385.8

申请日：2010-01-25

Applicant: Princo Corp.

Inventor： YANG, Chih-kuang

IPC: H05K3/38 ,  H05K3/04

CPC classification number: H05K3/4007 ,  H01L2224/11 ,  H05K1/111 ,  H05K1/118 ,  H05K3/048 ,  H05K2201/0367 ,  H05K2201/098 ,  H05K2201/09845 ,  H05K2201/099 ,  H05K2203/0588 ,  H05K2203/0594

Abstract: Disclosed is a metal structure of a multi-layer substrate, comprising a first metal layer and a dielectric layer. The first metal layer has an embedded base and a main body positioned on the embedded base. The base area of the embedded base is larger than the base area of the main body. After the dielectric layer covers the main body and the embedded base, the dielectric layer is opened at the specific position of the first metal layer for connecting the first metal layer with a second metal layer above the dielectric layer. When the metal structure is employed as a pad or a metal line of the flexible multi-layer substrate according to the present invention, the metal structure cannot easily be delaminated or separated from the contacted dielectric layer. Therefore, a higher reliability for the flexible multi-layer substrate can be achieved.

Abstract translation: 公开了包括第一金属层和电介质层的多层基板的金属结构。 第一金属层具有嵌入式基座和位于嵌入式基座上的主体。 嵌入式基座的基座面积大于主体的基座面积。 在电介质层覆盖主体和嵌入式基底之后，电介质层在第一金属层的特定位置处打开，用于将第一金属层与电介质层上方的第二金属层连接。 当金属结构用作根据本发明的柔性多层基板的焊盘或金属线时，金属结构不容易从接触的介电层分层或分离。 因此，可以实现柔性多层基板的更高的可靠性。

公开(公告)号：EP2461656A3

公开(公告)日：2012-08-01

申请号：EP12000096.3

申请日：2007-03-14

Applicant: Sumitomo Bakelite Company, Ltd.

Inventor： Chuma, Toshiaki ,  Inaba, Makoto

IPC: H05K1/14 ,  H05K3/36

CPC classification number: H05K1/148 ,  H05K3/363 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09481

Abstract: There is provided a circuit board including a first and a second circuit substrate located with a spacing, on which a first and a second conductor pad are provided respectively; and a connection substrate including a first and a second conductor post projecting from one or the other side; the connection substrate being disposed so as to cover a portion of the first and the second circuit substrate, and bridged therebetween; the first conductor post and the first conductor pad, as well as the second conductor post and the second conductor pad, being disposed so as to oppose each other; the circuit board also including a connector portion to be formed upon melting a metal coating layer, formed in advance on a surface of at least one of the first conductor post and the first conductor pad, and on a surface of at least one of the second conductor post and the second conductor pad; the first and the second circuit substrate and the connection substrate being electrically connected through the connector portion.