利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

18 条记录 (耗时 0.014 秒)

    Encrypting device, encrypting method and program
    1.
    发明授权
    Encrypting device, encrypting method and program 有权
    加密设备，加密方法和程序

    公开(公告)号：EP2237246B1

    公开(公告)日：2018-02-28

    申请号：EP08702793.4

    申请日：2008-01-18

    申请人： Fujitsu Limited

    发明人： YAJIMA, Jun ,  YAMAMOTO, Dai ,  ITOH, Kouichi

    IPC分类号： G09C1/00 ,  H04L9/06

    CPC分类号： H04L9/0625 ,  H04L2209/122 ,  H04L2209/24 ,  H04L2209/805

    摘要： When processing a data conversion function of a MISTY structure, such as the FO function of MISTY1, the logical calculation result t3 of the exclusive OR 614 of the process result of the FI function 602 of the MISTY structure in the second stage and a logical calculation result t1 of an exclusive OR 612 of the MISTY structure in the first stage is not stored in a register. The logical calculation result t3 and the logical calculation result of respective exclusive OR 642 and 643 are subject to a direct exclusive OR with the respective exclusive OR 642 and 643.

    INDIVIDUAL-SPECIFIC INFORMATION GENERATION DEVICE AND INDIVIDUAL-SPECIFIC INFORMATION GENERATION METHOD
    2.
    发明公开
    INDIVIDUAL-SPECIFIC INFORMATION GENERATION DEVICE AND INDIVIDUAL-SPECIFIC INFORMATION GENERATION METHOD 审中-公开
    设备技术生成各特定信息和方法生成各具体信息

    公开(公告)号：EP2590355A1

    公开(公告)日：2013-05-08

    申请号：EP10854093.1

    申请日：2010-06-30

    申请人： Fujitsu Limited

    发明人： YAMAMOTO, Dai ,  TAKENAKA, Masahiko ,  ITOH, Kouichi

    IPC分类号： H04L9/10

    CPC分类号： G06F7/582 ,  G06F7/588 ,  G09C1/00 ,  H04L9/0866 ,  H04L9/0869 ,  H04L9/3278

    摘要： The generation of individual-specific information having a good reliability and uniqueness is made possible with a little circuit scale. For this purpose, an individual-specific information generation apparatus that generates individual-specific information of an electronic device is configured including a plurality of digital circuits, a random number judgment unit and an individual-specific information generation unit. Here, the plurality of digital circuits are in the same circuit configuration. Each of the digital circuits outputs a fixed output value or a random number output value individually without their output with respect to a certain input being determined unambiguously among the digital circuits. Meanwhile, in each of the digital circuit, an order is defined in advance. The random number judgment unit judges whether the output value is a random value or fixed, for each of the plurality of digital circuits. Then, the individual-specific information generation unit generates the individual-specific information based on information of the order defined in the digital circuit judge by the random number judgment unit as having a fixed output value among the plurality of digital circuits and the output value.

    摘要翻译： 的具有良好的可靠性和唯一个人特定信息的生成成为可能用少量的电路规模。 为了这个目的，在个人特定信息生成装置生成的确率被配置为包括数字电路，一个随机数判断单元的和个人特定信息生成单元中的多个电子设备的个人特定信息。 在这里，数字电路的多元性在相同的电路结构。 每个数字电路的输出固定输出值或随机数输出值，而无需单独它们相对于输出到某些输入是确定性的数字电路中明确地开采。 同时，在每一个数字电路的，一个订单被预先定义。 随机数判断单元判断是否输出值是随机值或固定的，对于每一个数字电路的多个。 然后，个体特异性信息生成单元基因率基于由所述随机数判定单元在数字电路中判断定义为具有数字电路的多元性和输出值之间的固定的输出值的顺序的信息的各个特定的信息。

    BUILT-IN DEVICE WITH FAULT ATTACK COUNTERMEASURE FUNCTION
    3.
    发明公开
    BUILT-IN DEVICE WITH FAULT ATTACK COUNTERMEASURE FUNCTION 有权
    EINGEBAUTE EINRICHTUNG MIT FEHLERATTACKEN-GEGENMASSNAHMEFUNKTION

    公开(公告)号：EP2138990A1

    公开(公告)日：2009-12-30

    申请号：EP07736909.8

    申请日：2007-03-19

    申请人： Fujitsu Limited

    发明人： FURUKAWA, Kazuyoshi ,  ITOH, Kouichi ,  TAKENAKA, Masahiko

    IPC分类号： G09C1/00 ,  G06F7/72

    CPC分类号： G06F7/723 ,  G06F7/728 ,  G06F2207/7271 ,  H04L9/004 ,  H04L9/302 ,  H04L9/3066

    摘要： A cryptographic processing device, comprising: a storage unit; initial setting unit for setting a value to be stored in the storage unit; Montgomery modular multiplication operation unit for performing a Montgomery modular multiplication operation plural times for a value set by the initial setting unit; and fault attack detection unit for determining whether or not a fault attack occurred for each of at least some parts of the Montgomery modular multiplication operations performed plural times.

    摘要翻译： 一种加密处理装置，包括：存储单元; 初始设定单元，用于设定存储在存储单元中的值; 蒙哥马利乘法运算单元，用于对由初始设定单元设定的值进行多次蒙哥马利乘法运算; 以及故障攻击检测单元，用于确定多次执行的蒙哥马利乘法运算的至少一些部分中的每一个是否发生故障攻击。

    VERIFICATION METHOD, VERIFICATION PROGRAM, INFORMATION PROCESSING DEVICE, AND SYSTEM
    4.
    发明公开
    VERIFICATION METHOD, VERIFICATION PROGRAM, INFORMATION PROCESSING DEVICE, AND SYSTEM 审中-实审

    公开(公告)号：EP4350555A1

    公开(公告)日：2024-04-10

    申请号：EP21943110.3

    申请日：2021-05-28

    申请人： FUJITSU LIMITED

    发明人： UNO, Kazuya ,  ITOH, Kouichi

    IPC分类号： G06F21/60

    摘要： First information (111) that makes it possible to identify a reliability of document creation by a first person is generated based on evaluation information (101) on documents created by the first person in the past. The first information (111) is transmitted to an information processing apparatus (100) together with a verification request for a document (110) newly created by the first person. The information processing apparatus (100) receives the verification request for the document (110) newly created by the first person together with the first information (111). When receiving the verification request, the information processing apparatus (100) generates second information (112) depending on the reliability of document creation by the first person based on the received first information (111). The information processing apparatus (100) outputs a verification result of the newly created document (110), the verification result containing the generated second information (112).

    ENCRYPTING METHOD HAVING COUNTERMEASURE FUNCTION AGAINST POWER ANALYZING ATTACKS
    6.
    发明公开
    ENCRYPTING METHOD HAVING COUNTERMEASURE FUNCTION AGAINST POWER ANALYZING ATTACKS 有权
    VERSCHLÜSSELUNGSFUNKTIONMIT EINER GEGENMASSNAHMEFUNKTION GEGEN LEISTUNGSANALYSEATTACKEN

    公开(公告)号：EP2264939A1

    公开(公告)日：2010-12-22

    申请号：EP08720699.1

    申请日：2008-03-31

    申请人： Fujitsu Limited

    发明人： ITOH, Kouichi

    IPC分类号： H04L9/10 ,  G09C1/00

    CPC分类号： G06F7/723 ,  G06F2207/7219 ,  H04L9/003 ,  H04L9/302

    摘要： Based on an encrypting method for performing an exponential remainder calculation y=a d (mod n) from an u-bit exponent d=(d u-1 , ..., d 0 ) 2 , input data a, and a modulo n, calculating a'=a 2 (mod n) is performed first. Next, calculating y=(a') f (mod n) is performed on f=(d u-1 , d u-2 , ..., d 1 ) 2 . Then, when d 0 =1, calculating y=y×a (mod n) is performed. Then, outputting y=a d (mod n) is performed. In the first step, although an attacker inputs data including a minus value such as a=-1 and a=s, -s, etc., only plus values can be constantly generated in multiplication and squaring. Therefore, the method makes it hard to estimate a secret key using power analyzing attacks such as the SPA and the DPA, thereby realizing an encryption processor having high tamper-resistance.

    摘要翻译： 基于用于从u位指数d =（d u-1，...，d 0）2，输入数据a和模n执行指数余数计算y = ad（mod n）的加密方法， 首先计算“= a 2（mod n）”。 接下来，对f =（d u-1，d u-2，...，d 1）2进行y =（a'）f（mod n）的计算。 然后，当d 0 = 1时，执​​行y = y×a（mod n）的计算。 然后，输出y = a d（mod n）。 在第一步中，虽然攻击者输入包括诸如a = -1和a = s，-s等的负值的数据，但是只能在乘法和平方中产生加值。 因此，该方法难以使用诸如SPA和DPA之类的功率分析攻击来估计秘密密钥，从而实现具有高抗篡改性的加密处理器。

    PROCESSOR OF DATA CONVERSION FUNCTION
    7.
    发明公开
    PROCESSOR OF DATA CONVERSION FUNCTION 有权
    处理器的数据实施的作用

    公开(公告)号：EP2237245A1

    公开(公告)日：2010-10-06

    申请号：EP08702792.6

    申请日：2008-01-18

    申请人： Fujitsu Limited

    发明人： YAMAMOTO, Dai ,  YAJIMA, Jun ,  ITOH, Kouichi

    IPC分类号： G09C1/00 ,  H04L9/06

    CPC分类号： H04L9/0625 ,  H04L2209/122 ,  H04L2209/125 ,  H04L2209/20 ,  H04L2209/24

    摘要： In a MISTY1 FI function, an exclusive OR 102 to which a round key KIij2 is inputted is arranged between an exclusive OR 101 arranged on a 9-bit critical path 100a in a first MISTY structure and a zero-extend conversion 120U connected to the branching point 301 of a 7-bit right system data path 110a. Then, a 9-bit round key KIij1 is truncate-converted to seven bits, the exclusive OR of the seven bits and the round key KIij1 is calculated by an exclusive OR 113 and the calculation result is inputted to an exclusive OR 112 arranged on the right system data path 110a in the second stage MISTY structure.