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1.
公开(公告)号:EP2704012A1
公开(公告)日:2014-03-05
申请号:EP13179559.3
申请日:2013-10-09
Applicant: Freescale Semiconductor, Inc.
Inventor: Cunningham, Jeffrey C. , Gasquet, Horatio P. , Scouller, Ross S. , Cabassi, Marco A.
CPC classification number: G06F11/1048 , G11C29/026 , G11C29/028
Abstract: Methods and systems are disclosed for adaptive error correction for non-volatile memories that dynamically adjust sense amplifier read detection windows. Memory control circuitry (120) uses error correction code (ECC) routines (124) to detect bit errors that are non-correctable using these ECC routines. The memory control circuitry (120) then dynamically adjusts sense amplifier read detection windows (312) to allow for correct data to be determined. Corrected data can then be output to external circuitry. The corrected data can also be stored for later access when subsequent read operations attempt to access address locations that previously suffered bit failures. The disclosed methods and systems can also be used with respect to memories that are not non-volatile memories.
Abstract translation: 公开了用于对动态调整读出放大器读取检测窗口的非易失性存储器进行自适应纠错的方法和系统。 存储器控制电路(120)使用错误校正码(ECC)例程(124)来检测使用这些ECC例程不可校正的比特错误。 存储器控制电路(120)然后动态调整读出放大器读取检测窗口(312)以允许确定正确的数据。 然后可以将校正后的数据输出到外部电路。 当后续读取操作尝试访问先前遭受位故障的地址位置时,校正的数据也可以存储以供以后访问。 所公开的方法和系统也可以用于不是非易失性存储器的存储器。
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2.
公开(公告)号:EP2704012A8
公开(公告)日:2014-04-30
申请号:EP13179559.3
申请日:2013-08-07
Applicant: Freescale Semiconductor, Inc.
Inventor: Cunningham, Jeffrey C. , Gasquet, Horatio P. , Scouller, Ross S. , Cabassi, Marco A.
CPC classification number: G06F11/1048 , G11C29/026 , G11C29/028
Abstract: Methods and systems are disclosed for adaptive error correction for non-volatile memories that dynamically adjust sense amplifier read detection windows. Memory control circuitry (120) uses error correction code (ECC) routines (124) to detect bit errors that are non-correctable using these ECC routines. The memory control circuitry (120) then dynamically adjusts sense amplifier read detection windows (312) to allow for correct data to be determined. Corrected data can then be output to external circuitry. The corrected data can also be stored for later access when subsequent read operations attempt to access address locations that previously suffered bit failures. The disclosed methods and systems can also be used with respect to memories that are not non-volatile memories.
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